參數(shù)資料
型號(hào)： P87C557E8
廠商： NXP Semiconductors N.V.
元件分類： 8位微控制器
英文描述： 8 BIT MICROCONTROLLER
中文描述： 8位微控制器
文件頁(yè)數(shù)： 9/84頁(yè)
文件大?。?/td> 322K
代理商： P87C557E8
1999 Mar 12
9
Philips Semiconductors
Product specification
8-bit microcontroller
P8xC557E8
XTAL2
51
Crystal pin 2:
output of the inverting amplifier that forms the oscillator.
Left open-circuit when an external oscillator clock is used.
Crystal pin 1:
input to the inverting amplifier that forms the oscillator, and input to the
internal clock generator. Receives the external oscillator clock signal when an external
oscillator is used. Must be connected to logic HIGH if the PLL oscillator is selected
(SELXTAL1 = LOW).
Port 2 (P2.0 to P2.7)
: 8-bit quasi-bidirectional I/O port lines;
A08 to A15
: High-order address byte for external memory.
Program Store Enable
output: read strobe to the external Program Memory via
Ports 0 and 2. Is activated twice each machine cycle during fetches from external
Program Memory. When executing out of external Program Memory two activations of
PSEN are skipped during each access to external Data Memory. PSEN is not
activated (remains HIGH) during no fetches from external Program Memory. PSEN
can sink/source 8 LSTTL inputs. It can drive CMOS inputs without external pull-ups.
Address Latch Enable
output. Latches the low byte of the address during access of
external memory in normal operation. It is activated every six oscillator periods except
during an external Data Memory access. ALE can sink/source 8 LSTTL inputs. It can
drive CMOS inputs without an external pull-up. To prohibit the toggling of ALE pin (RFI
noise reduction) the bit RFI (SFR: PCON.5) must be set by software; see Section 2.2.
PROG
: the programming pulse input; alternative function for the P87C557E8.
External Access
input. If, during reset, EA is held at a TTL level HIGH the CPU
executes out of the internal Program Memory. If, during reset, EA is held at a TTL level
LOW the CPU executes out of external Program Memory via Port 0 and Port 2. EA is
not allowed to float. EA is latched during reset and don’t care after reset.
V
PP
: the programming supply voltage; alternative function for the P87C557E8.
Port 0 (P0.7 to P0.0)
: 8-bit open-drain bidirectional I/O port lines;
AD7 to AD0
: Multiplexed Low-order address and Data bus for external memory.
Power supply,
analog part (+5 V). For PLL oscillator.
Ground
, analog part. For PLL oscillator.
Crystal pin 3:
output of the inverting amplifier that forms the 32 kHz oscillator.
Crystal pin 2:
input to the inverting amplifier that forms the 32 kHz oscillator. XTAL3 is
pulled LOW if the PLL oscillator is not selected (SELXTAL1 = 1) or if reset is active.
SELXTAL1 = HIGH, selects the HF oscillator, using the XTAL1/XTAL2 crystal.
If SELXTAL1 = LOW the PLL is selected for clocking of the controller, using the
XTAL3/XTAL4 crystal.
XTAL1
52
P2.0/A08 to
P2.7/A15
PSEN
55 to 62
63
ALE/PROG
64
EA/V
PP
65
P0.7/AD7 to
P0.0/AD0
V
DDA2
V
SSA2
XTAL3
XTAL4
68 to 75
76
77
78
79
SELXTAL1
80
SYMBOL
PIN
DESCRIPTION
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