參數(shù)資料
型號(hào)： P87C554SBBD
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 微控制器/微處理器
英文描述： 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP
中文描述： 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP64
封裝： 10 X 10 X 1.40 MM, PLASTIC, LQFP-64
文件頁(yè)數(shù)： 72/76頁(yè)
文件大小： 400K
代理商： P87C554SBBD
Philips Semiconductors
Preliminary specification
80C554/83C554/87C554
80C51 8-bit microcontroller – 6 clock operation
16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I
2
C, PWM,
capture/compare, high I/O, 64L LQFP
2000 Nov 10
72
V
DD
P0
EA
RST
XTAL1
XTAL2
V
SS
V
DD
V
DD
I
DD
(NC)
CLOCK SIGNAL
V
DD
P1.6
P1.7
STADC
EW
AV
SS
AV
ref–
SU00219
Figure 59. I
DD
Test Condition, Idle Mode
All other pins are disconnected
2
2. Idle Mode:
a. The following pins must be forced to V
DD
: Port 0 and EW.
b. The following pins must be forced to V
SS
: RST, STADC, AV
ss
, AV
ref–
, and EA.
c. Ports 1.6 and 1.7 should be connected to V
DD
through resistors of sufficiently high value such that the sink current into these pins
cannot exceed the I
OL1
spec of these pins. These pins must not have logic 0 written to them prior to this measurement.
d. The following pins must be disconnected: XTAL2 and all pins not specified above.
V
DD
–0.5
0.5V
0.7V
DD
0.2V
DD
–0.1
t
CHCL
t
CLCL
t
CLCH
t
CLCX
t
CHCX
SU00220
Figure 60. Clock Signal Waveform for I
DD
Tests in Active and Idle Modes
t
CLCH
= t
CHCL
= 5 ns
V
DD
P0
RST
XTAL1
XTAL2
V
SS
V
DD
V
DD
I
DD
(NC)
V
DD
P1.6
P1.7
STADC
EA
EW
AV
SS
AV
ref–
SU00221
Figure 61. I
DD
Test Condition, Power Down Mode
All other pins are disconnected. V
DD
= 2 V to 5.5 V
3
3. Power Down Mode:
a. The following pins must be forced to V
DD
: Port 0 and EW.
b. The following pins must be forced to V
SS
: RST, STADC, XTAL1, AV
ss
, AV
ref–
, and EA.
c. Ports 1.6 and 1.7 should be connected to V
DD
through resistors of sufficiently high value such that the sink current into these pins
cannot exceed the I
OL1
spec of these pins. These pins must not have logic 0 written to them prior to this measurement.
d. The following pins must be disconnected: XTAL2 and all pins not specified above.
相關(guān)PDF資料
PDF描述
P83C554SBBD 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP
P80C554SBBD 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP
P87C554SFBD 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP
P83C554SFBD 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP
P87C554 80C51 8-bit microcontroller(80C51 8位微控制器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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