參數(shù)資料
型號(hào)： P87C52UBPN,112
廠商： NXP Semiconductors
文件頁數(shù)： 27/38頁
文件大小： 0K
描述： IC 80C51 MCU 256 RAM 40DIP
產(chǎn)品培訓(xùn)模塊： Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝： 9
系列： 87C
核心處理器： 8051
芯體尺寸： 8-位
速度： 33MHz
連通性： EBI/EMI，UART/USART
外圍設(shè)備： POR
輸入/輸出數(shù)： 32
程序存儲(chǔ)器容量： 8KB（8K x 8）
程序存儲(chǔ)器類型： OTP
RAM 容量： 256 x 8
電壓 - 電源 (Vcc/Vdd)： 4.5 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： 0°C ~ 70°C
封裝/外殼： 40-DIP（0.600"，15.24mm）
包裝： 管件
其它名稱： 935253730112
P87C52UBPN
P87C52UBPN-ND
Philips Semiconductors
Product specification
80C51/87C51/80C52/87C52
80C51 8-bit microcontroller family
4 K/8 K OTP/ROM low voltage (2.7 V–5.5 V),
low power, high speed (33 MHz), 128/256 B RAM
2000 Aug 07
33
PROGRAMMING
*
VERIFICATION
*
ADDRESS
DATA IN
DATA OUT
LOGIC 1
LOGIC 0
tAVQV
tEHQZ
tELQV
tSHGL
tGHSL
tGLGH
tGHGL
tAVGL
tGHAX
tDVGL
tGHDX
P1.0–P1.7
P2.0–P2.5
P3.4
(A0 – A12)
PORT 0
P0.0 – P0.7
(D0 – D7)
ALE/PROG
EA/VPP
P2.7
**
SU01414
tEHSH
NOTES:
*
FOR PROGRAMMING CONFIGURATION SEE FIGURE 26.
FOR VERIFICATION CONDITIONS SEE FIGURE 28.
**
SEE TABLE 8.
Figure 29. EPROM Programming and Verification
MASK ROM DEVICES
Security Bits
With none of the security bits programmed the code in the program
memory can be verified. If the encryption table is programmed, the
code will be encrypted when verified. When only security bit 1 (see
Table 10) is programmed, MOVC instructions executed from
external program memory are disabled from fetching code bytes
from the internal memory, EA is latched on Reset and all further
programming of the EPROM is disabled. When security bits 1 and 2
are programmed, in addition to the above, verify mode is disabled.
Encryption Array
64 bytes of encryption array are initially unprogrammed (all 1s).
Table 10. Program Security Bits
PROGRAM LOCK BITS1, 2
SB1
SB2
PROTECTION DESCRIPTION
1
U
No Program Security features enabled.
(Code verify will still be encrypted by the Encryption Array if programmed.)
2
P
U
MOVC instructions executed from external program memory are disabled from fetching code bytes from
internal memory, EA is sampled and latched on Reset, and further programming of the EPROM is disabled.
NOTES:
1. P – programmed. U – unprogrammed.
2. Any other combination of the security bits is not defined.
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