80C51 8-bit microcontroller family 8KB/16KB/32KB/64K" />
參數(shù)資料
型號: P87C51RB2BBD,157
廠商: NXP Semiconductors
文件頁數(shù): 12/67頁
文件大小: 0K
描述: IC 80C51 MCU 512 RAM 44LQFP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 800
系列: 87C
核心處理器: 8051
芯體尺寸: 8-位
速度: 33MHz
連通性: EBI/EMI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 16KB(16K x 8)
程序存儲器類型: OTP
RAM 容量: 512 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: 0°C ~ 70°C
封裝/外殼: 44-LQFP
包裝: 托盤
其它名稱: 568-8732
935271877157
P87C51RB2BBD
P87C51RB2BBD,157-ND
P87C51RB2BBD-ND
Philips Semiconductors
Product data
P87C51RA2/RB2/RC2/RD2
80C51 8-bit microcontroller family 8KB/16KB/32KB/64KB OTP
with 512B/1KB RAM, low voltage (2.7 to 5.5 V), low power, high
speed (30/33 MHz)
2
2003 Jan 24
853–2391 29335
DESCRIPTION
The devices are Single-Chip 8-Bit Microcontrollers manufactured in
an advanced CMOS process and are derivatives of the 80C51
microcontroller family. The instruction set is 100% compatible with
the 80C51 instruction set.
The devices support 6-clock/12-clock mode selection by
programming an OTP bit (OX2) using parallel programming. In
addition, an SFR bit (X2) in the clock control register (CKCON)
also selects between 6-clock/12-clock mode.
The devices also have four 8-bit I/O ports, three 16-bit timer/event
counters, a multi-source, four-priority-level, nested interrupt structure,
an enhanced UART and on-chip oscillator and timing circuits.
The added features of the P87C51RA2/RB2/RC2/RD2 make it a
powerful microcontroller for applications that require pulse width
modulation, high-speed I/O and up/down counting capabilities such
as motor control.
FEATURES
80C51 Central Processing Unit
8 kbytes OTP (87C51RA2)
16 kbytes OTP (87C51RB2)
32 kbytes OTP (87C51RC2)
64 kbytes OTP (87C51RD2)
512 byte RAM (87C51RA2/RB2/RC2)
1 kbyte RAM (87C51RD2)
Boolean processor
Fully static operation
Low voltage (2.7 V to 5.5 V at 16 MHz) operation
12-clock operation with selectable 6-clock operation (via software
or via parallel programmer)
Memory addressing capability
Up to 64 kbytes ROM and 64 kbytes RAM
Power control modes:
Clock can be stopped and resumed
Idle mode
Power-down mode
CMOS and TTL compatible
Two speed ranges at V
CC = 5 V
0 to 30 MHz with 6-clock operation
0 to 33 MHz with 12-clock operation
Parallel programming with 87C51 compatible hardware interface
to programmer
RAM expandable externally to 64 kbytes
Programmable Counter Array (PCA)
PWM
Capture/compare
PLCC, LQFP, or DIP package
Extended temperature ranges
Dual Data Pointers
Security bits (3 bits)
Encryption array - 64 bytes
Seven interrupt sources
4 interrupt priority levels
Four 8-bit I/O ports
Full-duplex enhanced UART
Framing error detection
Automatic address recognition
Three 16-bit timers/counters T0, T1 (standard 80C51) and
additional T2 (capture and compare)
Programmable clock-out pin
Asynchronous port reset
Low EMI (inhibit ALE, slew rate controlled outputs, and 6-clock
mode)
Wake-up from Power Down by an external interrupt
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