參數(shù)資料
型號(hào)： P87C151SB
廠商： INTEL CORP
元件分類： 微控制器/微處理器
英文描述： HIGH-PERFORMANCE CHMOS MICROCONTROLLER
中文描述： 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PDIP40
封裝： PLASTIC, DIP-40
文件頁(yè)數(shù)： 13/33頁(yè)
文件大小： 312K
代理商： P87C151SB
8XC151SA/SB HIGH-PERFORMANCE CHMOS MICROCONTROLLER
DC CHARACTERISTICS
Parameter values apply to all devices unless otherwise indicated.
Table 8. DC Characteristics at V
CC
e
4.5V
b
5.5V
Symbol
Parameter
Min
Typical
Max
Units
Test Conditions
V
IL
Input Low Voltage
(except EA
Y
)
b
0.5
0.2V
CC
b
0.1
V
V
IL1
Input Low Voltage
(EA
Y
)
0
0.2V
CC
b
0.3
V
V
IH
Input High Voltage
(except XTAL1, RST)
0.2V
CC
a
0.9
V
CC
a
0.5
V
V
IH1
Input High Voltage
(XTAL1, RST)
0.7V
CC
V
CC
a
0.5
V
V
OL
Output Low Voltage
(Port 1, 2, 3)
0.3
0.45
1.0
V
I
OL
e
100
m
A
I
OL
e
1.6 mA
I
OL
e
3.5 mA
(Note 1, Note 2)
V
OL1
Output Low Voltage
(Port 0, ALE, PSEN
Y
)
0.3
0.45
1.0
V
I
OL
e
200
m
A
I
OL
e
3.2 mA
I
OL
e
7.0 mA
(Note 1, Note 2)
V
OH
Output High Voltage
(Port 1, 2, 3, ALE,
PSEN
Y
)
V
CC
b
0.3
V
CC
b
0.7
V
CC
b
1.5
V
I
OH
e b
10
m
A
I
OH
e b
30
m
A
I
OH
e b
60
m
A
(Note 3)
NOTES:
1. Under steady-state (non-transient) conditions, I
OL
must be externally limited as follows:
Maximum I
OL
per port pin:
Maximum I
OL
per 8-bit port:
port 0
ports 1–3
Maximum Total I
OL
for
all output pins
If I
OL
exceeds the test conditions, V
OL
may exceed the related specification. Pins are not guaranteed to sink current
greater than the listed test conditions.
2. Capacitive loading on ports 0 and 2 may cause spurious noise pulses above 0.4V on the low-level outputs of ALE and
ports 1, 2, and 3. The noise is due to external bus capacitance discharging into the port 0 and port 2 pins when these
pins change from high to low. In applications where capacitive loading exceeds 100 pF, the noise pulses on these
signals may exceed 0.8V. It may be desirable to qualify ALE or other signals with a Schmitt trigger or CMOS-level input
logic.
3. Capacitive loading on ports 0 and 2 causes the V
OH
on ALE and PSEN
Y
to drop below the specification when the
address lines are stabilizing.
4. Typical values are obtained using V
CC
e
5.0, T
A
e
25
§
C and are not guaranteed.
10 mA
26 mA
15 mA
71 mA
13
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