參數(shù)資料
型號: P83C654EHBB
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: CMOS single-chip 8-bit microcontroller
中文描述: 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP44
封裝: 10 X 10 X 1.75 MM, PLASTIC, QFP-44
文件頁數(shù): 52/88頁
文件大?。?/td> 497K
代理商: P83C654EHBB
Philips Semiconductors
Product data
P83C654X2/P87C654X2
80C51 8-bit microcontroller family
16 kB OTP/ROM,
256B RAM, low voltage (2.7 to 5.5 V), low power, high speed
(30/33 MHz)
2004 Apr 20
52
!********************************************************************************************************
! SI01 EQUATE LIST
!********************************************************************************************************
!********************************************************************************************************
! LOCATIONS OF THE SI01 SPECIAL FUNCTION REGISTERS
!********************************************************************************************************
S1CON
–0xd8
S1STA
–0xd9
S1DAT
–0xda
S1ADR
–0xdb
00D8
00D9
00DA
00DB
00A8
00B8
IEN0
IP0
–0xa8
–02b8
!********************************************************************************************************
! BIT LOCATIONS
!********************************************************************************************************
00DD
00BD
STA
SI01HP
–0xdd
–0xbd
! STA bit in S1CON
! IP0, SI01 Priority bit
!********************************************************************************************************
! IMMEDIATE DATA TO WRITE INTO REGISTER S1CON
!********************************************************************************************************
ENS1_NOTSTA_STO_NOTSI_AA_CR0
00D5
–0xd5
! Generates STOP
! (CR0 = 100kHz)
! Releases BUS and
! ACK
! Releases BUS and
! NOT ACK
! Releases BUS and
! set STA
00C5
ENS1_NOTSTA_NOTSTO_NOTSI_AA_CR0
–0xc5
00C1
ENS1_NOTSTA_NOTSTO_NOTSI_NOTAA_CR0
–0xc1
00E5
ENS1_STA_NOTSTO_NOTSI_AA_CR0
–0xe5
!********************************************************************************************************
! GENERAL IMMEDIATE DATA
!********************************************************************************************************
OWNSLA –0x31
0031
! Own SLA+General Call
! must be written into S1ADR
! EA+ES1, enable I
2
C interrupt
! must be written into IEN0
! select PAG1 as HADD
! SLA+W to be transmitted
! SLA+R to be transmitted
! Select Register Bank 3
00A0
ENSI01
–0xa0
0001
00C0
00C1
0018
PAG1
SLAW
SLAR
SELRB3
–0x01
–0xc0
–0xc1
–0x18
!********************************************************************************************************
! LOCATIONS IN DATA RAM
!********************************************************************************************************
MTD
–0x30
MRD
–0x38
SRD
–0x40
STD
–0x48
0030
0038
0040
0048
! MST/TRX/DATA base address
! MST/REC/DATA base address
! SLV/REC/DATA base address
! SLV/TRX/DATA base address
0053
BACKUP
–0x53
! Backup from NUMBYTMST
! To restore NUMBYTMST in case
! of an Arbitration Loss.
! Number of bytes to transmit
! or receive as MST.
! Contains SLA+R/W to be
! transmitted.
! High Address byte for STATE 0
! till STATE 25.
0052
NUMBYTMST
–0x52
0051
SLA
–0x51
0050
HADD
–0x50
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