1997 Apr 08
36
Philips Semiconductors
Product specification
8-bit microcontroller
P83C562; P80C562
Table 41
Instruction set description: Boolean variable manipulation
Table 42
Description of the mnemonics in the instruction set
MNEMONIC
DESCRIPTION
BYTES
CYCLES
OPCODE
(HEX)
Boolean variable manipulation
CLR
CLR
SETB
SETB
CPL
CPL
ANL
ANL
ORL
ORL
MOV
MOV
C
bit
C
bit
C
bit
C,bit
C,/bit
C,bit
C,/bit
C,bit
bit,C
Clear carry flag
Clear direct bit
Set carry flag
Set direct bit
Complement carry flag
Complement direct bit
AND direct bit to carry flag
AND complement of direct bit to carry flag
OR direct bit to carry flag
OR complement of direct bit to carry flag
Move direct bit to carry flag
Move carry flag to direct bit
1
2
1
2
1
2
2
2
2
2
2
2
1
1
1
1
1
1
2
2
2
2
1
2
C3
C2
D3
D2
B3
B2
82
B0
72
A0
A2
92
MNEMONIC
DESCRIPTION
Data addressing modes
Rr
direct
@Ri
#data
#data 16
bit
addr16
Working register R0-R7.
128 internal RAM locations and any special function register (SFR).
Indirect internal RAM location addressed by register R0 or R1 of the actual register bank.
8-bit constant included in instruction.
16-bit constant included as bytes 2 and 3 of instruction.
direct addressed bit in internal RAM or SFR.
16-bit destination address. Used by LCALL and LJMP. The branch will be anywhere within the
64 kbytes program memory address space.
11-bit destination address. Used by ACALL and AJMP. The branch will be within the same 2 kbytes
page of program memory as the first byte of the following instruction.
Signed (two's complement) 8-bit offset byte. Used by SJMP and all conditional jumps.
Range is
128 to +127 bytes relative to first byte of the following instruction.
addr11
rel
Hexadecimal opcode cross-reference
*
8, 9, A, B, C, D, E, F.
1, 3, 5, 7, 9, B, D, F.
0, 2, 4, 6, 8, A, C, E.