參數(shù)資料
型號(hào): P83C562
廠商: NXP Semiconductors N.V.
元件分類(lèi): 8位微控制器
英文描述: 8-BIT MICROCONTROLLER
中文描述: 8位微控制器
文件頁(yè)數(shù): 27/52頁(yè)
文件大?。?/td> 299K
代理商: P83C562
1997 Apr 08
27
Philips Semiconductors
Product specification
8-bit microcontroller
P83C562; P80C562
14.3.3
I
NTERRUPT PRIORITY REGISTER
0 (IP0)
Table 29
Interrupt Priority Register 0 (SFR address B8H)
Table 30
Description of IP0 bits (note 1)
Note
1.
A logic 0 = low priority; a logic 1 = high priority.
14.3.4
I
NTERRUPT
P
RIORITY
R
EGISTER
1 (IP1)
Table 31
Interrupt Priority Register 1 (SFR address F8H)
Table 32
Description of IP1 bits (note 1)
Note
1.
A logic 0 = low priority; a logic 1 = high priority.
7
6
5
4
3
2
1
0
PAD
PS0
PT1
PX1
PT0
PX0
BIT
SYMBOL
PAD
PS0
PT1
PX1
PT0
PX0
DESCRIPTION
7
6
5
4
3
2
1
0
Reserved.
ADC interrupt priority level.
Reserved.
SIO0 (UART) interrupt priority level.
Timer 1 interrupt priority level.
External interrupt 1 priority level.
Timer 0 interrupt priority level.
External interrupt 0 priority level.
7
6
5
4
3
2
1
0
PT2
PCM2
PCM1
PCM0
PCT3
PCT2
PCT1
PCT0
BIT
SYMBOL
DESCRIPTION
7
6
5
4
3
2
1
0
PT2
PCM2
PCM1
PCM0
PCT3
PCT2
PCT1
PCT0
T2 overflow interrupt(s) priority level.
T2 comparator 2 interrupt priority interrupt level.
T2 comparator 1 interrupt priority interrupt level.
T2 comparator 0 interrupt priority interrupt level.
T2 capture register 3 priority interrupt level.
T2 capture register 2 priority interrupt level.
T2 capture register 1 priority interrupt level.
T2 capture register 0 priority interrupt level.
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