參數(shù)資料
型號(hào): P80CE559EBB
廠(chǎng)商: NXP SEMICONDUCTORS
元件分類(lèi): 微控制器/微處理器
英文描述: Single-chip 8-bit microcontroller
中文描述: 8-BIT, 16 MHz, MICROCONTROLLER, PQFP80
文件頁(yè)數(shù): 18/72頁(yè)
文件大?。?/td> 524K
代理商: P80CE559EBB
Philips Semiconductors
Preliminary specification
P83CE559/P80CE559
Single-chip 8-bit microcontroller
1996 Aug 06
18
6.6
The P8xCE559 A/D Converter is a 10–bit, successive approximation
ADC with 8 multiplexed analog input channels. It additionally
contains a high input impedance comparator, a DAC built with 1024
series resistors and analog switches, registers and control logic.
Analog/Digital Converter (ADC)
Input voltage range is from AV
ref–
(typical 0V) to AV
ref+
(typical +5V).
A set of 8 buffer registers (10–bit) store the conversion results of the
proper analog input channel each.
11 Special Function Registers (SFR) perform the user software
interface to the ADC: a control SFR (ADCON), an analog port
scan–select SFR (ADPSS), 8 input channel related conversion
result SFR with the 8 lower result bits (ADRSL0...ADRSL7), one
common result SFR for the upper 2 result bits (ADRSH). An extra
SFR (P5) allows for reading digital input port data as an alternative
function of the 8 analog input pins.
In order to have a minimum of ADC service overhead in the
microcontroller program, the ADC is able to operate autonomously
within its user configurable autoscan function.
The functional diagram of the ADC is shown in Figure 14.
Feature Overview:
10–bit resolution.
8 multiplexed analog inputs.
Programmable autoscan of the analog inputs.
Bit oriented 8–bit scan–select register to select analog inputs.
Continuous scan or one time scan configurable from 1 to 8 analog
inputs.
Start of a conversion by software or with an external signal.
Eight 10–bit buffer registers, one register for each analog input
channel.
Interrupt request after one channel scan loop.
Programmable prescaler (dividing by 2, 4, 6, 8) to adapt to
different system clock frequencies.
Conversion time for one A/D conversion: 15
μ
s ... 50
μ
s
Differential non–linearity
Integral non–linearity
Offset error
Gain error
Absolute voltage error
Channel to channel matching
Crosstalk between analog inputs :
Monotonic and no missing codes.
Separated analog (AV
DD
, AV
SS
) and digital (V
DD
, V
SS
) supply
voltages.
Reference voltage at two special pins : AV
REF–
and AV
REF+
.
:
DLe
±
1 LSB.
:
ILe
±
2 LSB.
:
OSe
±
2LSB.
:
Ge
±
0.4 %.
:
Ae
±
3 LSB.
:
Mctc
±
1LSB.
Ct < –60dB. @100 kHz.
For further information on the ADC characteristics, refer to the “DC
CHARACTERISTICS” section.
Figure 14. Functional diagram of AD converter.
+
8
8
8
8
2
2
10
10
10
COMPARATOR
SAR
DAC
8x
10–bit result
registers
SCAN LOGIC
ADPSS
ADCON
2 LATCHES
Read
ADRS
H
Read
ADRSL
n
ANALOG
Mux.
ADC0
ADC7
AV
ref+
AV
ref–
AV
DD1
AV
SS1
ADEXS
INTERNAL BUS
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