參數(shù)資料
型號(hào): P80CE558
廠商: NXP Semiconductors N.V.
英文描述: Single-chip 8-bit microcontroller(8位單片微控制器)
中文描述: 單芯片8位微控制器(8位單片微控制器)
文件頁數(shù): 45/72頁
文件大?。?/td> 721K
代理商: P80CE558
Philips Semiconductors
Preliminary specification
P83CE558/P80CE558/P89CE558
Single-chip 8-bit microcontroller
1996 Aug 06
45
6.13.4
This counter provides an overflow signal every second, when the
32kHz oscillator is running.
Seconds Timer
The overflow output sets the interrupt flag SECINT. This interrupt
can be disabled/enabled by ENSECI. If SECINT is enabled, it is
logically ORed with INT1 (external interrupt 1).
Seconds interrupt and INT1 therefor share the same priority and
vector. The software has to check both flags SECINT (PLLCON.5)
and IE1 (TCON.3), to distinguish between the two interrupt sources.
SECINT can only be cleared via writing a ‘0’ to this bit .
The external interrupts INT0 , INT1 or the seconds interrupt can
Wake-up the PLL oscillator and the microcontroller as described in
chapter “Wake-up from Power-down Mode”.
For a Wake-up via INT1 or seconds interrupt, IE1 must be enabled
and level-sensitive.
A further function of the seconds timer is to control the start-up
timing of the microcontroller after Reset or after Wake-up from
Power-down. It controls the stretching of the reset pulse to the
microcontroller and controls releasing the system clock to the
microcontroller.
A RSTIN signal of 1us at minimum will reset the microcontroller.
In case of Reset or Wake-up with halted 32kHz oscillator: From
RSTIN falling edge or Wake-up interrupt it takes 560ms at maximum
for the start-up of the 32kHz oscillator itself and the stabilization of
the PLL’s.
In case of Wake-up with running 32kHz oscillator: From Wake-up
interrupt it takes about 1ms for the stabilization of the PLL’s.
After this start-up time, the microcontroller is supplied with the
system clock and – in case of a reset – the internally
stretched reset
signal overlaps about 45us, to guarantee a proper initialization of the
microcontroller.
For further information refer to section
6.11 Power reduction modes
.
XTAL3
Figure 45. Block diagram PLL
Oscil-
lator
32.768 KHz
C
1
32 kHz
Phase
comparator
Loop
filter
CCO
PD
Internal Bus
SECONDS TIMER
PLLCON
RSTIN
Programmable
divider
system clock
Reset to controller
’Seconds’
Interrupt
request
PD = power down
Stretched
Reset
RUN32 PD
R
f
C
2
XTAL4
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