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參數(shù)資料
| 型號： | P80C38X2 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | RECTIFIER BRIDGE 4A 200V 120A-ifsm 1V-vf 5uA-ir KBJ 20/TUBE |
| 中文描述： | 80C51的8位單片機系列4K/8K/16K/32K的ROM / RAM的檢察官辦公室128B/256B低電壓2.7至5.5 V，低功耗，高速33分之30兆赫 |
| 文件頁數(shù)： | 50/62頁 |
| 文件大小： | 403K |
| 代理商： | P80C38X2 |
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Philips Semiconductors
Product data
P80C3xX2; P80C5xX2;
P87C5xX2
80C51 8-bit microcontroller family
4K/8K/16K/32K ROM/OTP, low voltage (2.7 to 5.5 V),
low power, high speed (30/33 MHz)
2003 Jan 24
50
Table 9. EPROM Programming Modes
MODE
Read signature
Program code data
Verify code data
Pgm encryption table
Pgm security bit 1
Pgm security bit 2
Pgm security bit 3
Program to 6-clock mode
Verify 6-clock
4
Verify security bits
5
NOTES:
1. ‘0’ = Valid low for that pin, ‘1’ = valid high for that pin.
2. V
PP
= 12.75 V
±
0.25 V.
3. V
CC
= 5 V
±
10% during programming and verification.
4. Bit is output on P0.4 (1 = 12x, 0 = 6x).
5. Security bit one is output on P0.7.
Security bit two is output on P0.6.
Security bit three is output on P0.3.
*
ALE/PROG receives 5 programming pulses for code data (also for user array; 5 pulses for encryption or security bits) while V
PP
is held at
12.75 V. Each programming pulse is low for 100
μ
s (
±
10
μ
s) and high for a minimum of 10
μ
s.
RST
1
1
1
1
1
1
1
1
1
1
PSEN
0
0
0
0
0
0
0
0
0
0
ALE/PROG
1
0*
1
0*
0*
0*
0*
0*
1
1
EA/V
PP
1
V
PP
1
V
PP
V
PP
V
PP
V
PP
V
PP
1
1
P2.7
0
1
0
1
1
1
0
0
e
e
P2.6
0
0
0
0
1
1
1
0
0
0
P3.7
0
1
1
1
1
0
0
1
0
1
P3.6
0
1
1
0
1
0
1
0
1
0
P3.3
X
X
X
X
X
X
X
0
1
X
Table 10. Program Security Bits for EPROM Devices
PROGRAM LOCK BITS
1, 2
SB1
SB2
SB3
PROTECTION DESCRIPTION
1
U
U
U
No Program Security features enabled. (Code verify will still be encrypted by the Encryption Array if
programmed.)
2
P
U
U
MOVC instructions executed from external program memory are disabled from fetching code bytes
from internal memory, EA is sampled and latched on Reset, and further programming of the EPROM
is disabled.
3
P
P
U
Same as 2, also verify is disabled.
4
P
P
P
Same as 3, external execution is disabled. Internal data RAM is not accessible.
NOTES:
1. P – programmed. U – unprogrammed.
2. Any other combination of the security bits is not defined.
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