參數(shù)資料
型號: P5Z22V10IDD
英文描述: Electrically-Erasable PLD
中文描述: 電可擦除可編程邏輯器件
文件頁數(shù): 12/16頁
文件大?。?/td> 162K
代理商: P5Z22V10IDD
Philips Semiconductors
Product specification
P5Z22V10
5V zero power, TotalCMOS
, universal PLD device
1997 May 02
12
SWITCHING WAVEFORMS
t
S
NOTES:
1. V
T
= 1.5V.
2. Input pulse amplitude 0V to 3.0V.
3. Input rise and fall times 2.0ns max.
Combinatorial Output
Clock Width
Input to Output Disable/Enable
Asynchronous Reset
Synchronous Preset
t
PD
V
T
V
T
INPUT OR
FEEDBACK
COMBINATORIAL
OUTPUT
V
T
V
T
V
T
INPUT OR
FEEDBACK
CLOCK
REGISTERED
OUTPUT
t
S
t
H
t
CO
V
T
t
WH
CLOCK
t
WL
t
ER
t
EA
V
OH
– 0.5V
V
OL
+ 0.5V
INPUT
OUTPUT
V
T
V
T
V
T
V
T
V
T
t
ARW
t
AR
t
ARR
CLOCK
REGISTERED
OUTPUT
INPUT ASSERTING
ASYNCHRONOUS
RESET
t
H
V
T
V
T
V
T
V
T
t
SPR
INPUT ASSERTING
SYNCHRONOUS
PRESET
CLOCK
REGISTERED
OUTPUT
t
CO
SP00065
Registered Output
“AND” ARRAY – (I, B)
I, B
P, D
CODE
O
STATE
INACTIVE
1
CODE
STATE
CODE
STATE
CODE
STATE
TRUE
H
L
P, D
I, B
I, B
P, D
I, B
I, B
P, D
I, B
I, B
I, B
COMPLEMENT
DON’T CARE
SP00008
I, B
I, B
I, B
I, B
NOTE:
1. This is the initial state.
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