參數(shù)資料
型號(hào): P5Z22V10IDD
英文描述: Electrically-Erasable PLD
中文描述: 電可擦除可編程邏輯器件
文件頁數(shù): 11/16頁
文件大小: 162K
代理商: P5Z22V10IDD
Philips Semiconductors
Product specification
P5Z22V10
5V zero power, TotalCMOS
, universal PLD device
1997 May 02
11
TEST LOAD CIRCUIT
+5V
C
L
R
1
R
2
S
1
C
2
C
1
NOTE:
C
1
and C
2
are to bypass V
to GND.
R
1
= 300
, R
2
= 390
, C
L
= 35pF.
V
CC
GND
CK
I
n
I
0
F
0
F
n
DUT
OE
INPUTS
SP00481
THEVENIN EQUIVALENT
35pF
170
DUT OUTPUT
V
L
= 2.83V
SP00482
VOLTAGE WAVEFORM
90%
10%
1.5ns
1.5ns
+3.0V
0V
t
R
t
F
MEASUREMENTS:
All circuit delays are measured at the +1.5V level of
inputs and outputs, unless otherwise specified.
Input Pulses
SP00368
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