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參數(shù)資料
| 型號： | OPA687 |
| 英文描述： | Wideband, Ultra-Low Noise, Voltage Feedback OPERATIONAL AMPLIFIER With Power Down |
| 中文描述： | 寬帶，超低噪聲，電壓反饋運(yùn)算放大器打倒電源 |
| 文件頁數(shù)： | 15/16頁 |
| 文件大?。?/td> | 172K |
| 代理商： | OPA687 |
15
OPA687
DISABLE OPERATION
The OPA687 provides an optional disable feature that may
be used to reduce system power. If the DIS control pin is left
unconnected, the OPA687 will operate normally. To dis-
able, the control pin must be asserted low. Figure 9 shows
a simplified internal circuit for the disable control feature.
Note that it is the power in the output stage and not in the
load that determines internal power dissipation.
As an absolute worst-case example, compute the maximum
T
J
using an OPA687N (SOT23-6 package) in the circuit of
Figure 1 operating at the maximum specified ambient tem-
perature of +85
°
C and driving a grounded 100
load.
P
D
= 10V (20.5mA) + 5
2
/(4 (100
|| 789
)) = 275mW
Maximum T
J
= +85
°
C + (0.28W 150
°
C/W) = 127
°
C
All actual applications will operate at a lower junction
temperature than the 127
°
C computed above. Compute your
actual output stage power to get an accurate estimate of
maximum junction temperature, or use the results shown
here as an absolute maximum.
BOARD LAYOUT
Achieving optimum performance with a high frequency
amplifier like the OPA687 requires careful attention to
board layout parasitics and external component types. Rec-
ommendations that will optimize performance include:
a) Minimize parasitic capacitance to any AC ground for
all of the signal I/O pins.
Parasitic capacitance on the
output and inverting input pins can cause instability: on the
non-inverting input, it can react with the source impedance
to cause unintentional bandlimiting. To reduce unwanted
capacitance, a window around the signal I/O pins should be
opened in all of the ground and power planes around those
pins. Otherwise, ground and power planes should be unbro-
ken elsewhere on the board.
b) Minimize the distance (< 0.25") from the power
supply pins to high frequency 0.1
μ
F decoupling capaci-
tors.
At the device pins, the ground and power plane layout
should not be in close proximity to the signal I/O pins. Avoid
narrow power and ground traces to minimize inductance
between the pins and the decoupling capacitors. The power
supply connections should always be decoupled with these
capacitors. Larger (2.2
μ
F to 6.8
μ
F) decoupling capacitors,
effective at lower frequency, should also be used on the
main supply pins. These may be placed somewhat farther
from the device and may be shared among several devices in
the same area of the PC board.
c) Careful selection and placement of external compo-
nents will preserve the high frequency performance of
the OPA687.
Resistors should be a very low reactance type.
Surface-mount resistors work best and allow a tighter over-
all layout. Metal-film and carbon composition, axially-leaded
resistors can also provide good high frequency performance.
Again, keep their leads and PC board trace length as short as
possible. Never use wirewound type resistors in a high
frequency application. Since the output pin and inverting
input pin are the most sensitive to parasitic capacitance,
always position the feedback and series output resistor, if
any, as close as possible to the output pin. Other network
components, such as non-inverting input termination resis-
tors, should also be placed close to the package. Where
double-side component mounting is allowed, place the feed-
25k
110k
15k
I
Control
–V
S
+V
S
V
DIS
Q1
FIGURE 9. Simplified Disabled Control Circuit.
In normal operation, base current to Q1 is provided through
the 110k
resistor while the emitter current through the
15k
resistor sets up a voltage drop that is inadequate to
turn on the two diodes in Q1’s emitter. As V
DIS
is pulled
low, additional current is pulled through the 15k
resistor,
eventually turning on these two diodes (
≈
100
μ
A). At this
point, any further current pulled out of V
DIS
goes through
those diodes holding the emitter-based voltage of Q1 at
approximately zero volts. This shuts off the collector current
out of Q1, turning the amplifier off. The supply current in
the disable mode are only those required to operate the
circuit of Figure 9.
THERMAL ANALYSIS
The OPA687 will not require heatsinking or airflow in most
applications. Maximum desired junction temperature will
set the maximum allowed internal power dissipation as
described below. In no case should the maximum junction
temperature be allowed to exceed 175
°
C.
Operating junction temperature (T
J
) is given by T
A
+ P
D
θ
JA
. The total internal power dissipation (P
D
) is the sum of
quiescent power (P
DQ
) and additional power dissipated in
the output stage (P
DL
) to deliver load power. Quiescent
power is simply the specified no-load supply current times
the total supply voltage across the part. P
DL
will depend on
the required output signal and load but would, for a grounded
resistive load, be at a maximum when the output is fixed at
a voltage equal to 1/2 either supply voltage (for equal bipolar
supplies). Under this condition P
DL
= V
S2
/(4 R
L
) where R
L
includes feedback network loading. This is the absolute
highest power that can be dissipated for a given R
L
. All
actual applications will dissipate less power in the output
stage.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| OPA687N | 制造商:BB 制造商全稱:BB 功能描述:Wideband, Ultra-Low Noise, Voltage Feedback OPERATIONAL AMPLIFIER With Power Down |
| OPA687N/250 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Voltage-Feedback Operational Amplifier |
| OPA687N/3K | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Voltage-Feedback Operational Amplifier |
| OPA687U | 制造商:Rochester Electronics LLC 功能描述:OP AMP,HIGH SPEED VFB W/PWR DOWN - Bulk |
| OPA687U/2K5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Voltage-Feedback Operational Amplifier |
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