
15
OPA680
OPERATING SUGGESTIONS
OPTIMIZING RESISTOR VALUES
Since the OPA680 is a unity gain stable voltage feedback op
amp, a wide range of resistor values may be used for the
feedback and gain setting resistors. The primary limits on
these values are set by dynamic range (noise and distortion)
and parasitic capacitance considerations. For a non-invert-
ing unity gain follower application, the feedback connection
should be made with a 25
resistor, not a direct short. This
will isolate the inverting input capacitance from the output
pin and improve the frequency response flatness. Usually,
for G > 1 application, the feedback resistor value should be
between 200
and 1.5k
. Below 200
, the feedback net-
work will present additional output loading which can
degrade the harmonic distortion performance of the OPA680.
Above 1.5k
, the typical parasitic capacitance (approxi-
mately 0.2pF) across the feedback resistor may cause unin-
tentional band-limiting in the amplifier response.
A good rule of thumb is to target the parallel combination of
R
F
and R
G
(Figure 1) to be less than approximately 300
.
The combined impedance R
F
|| R
G
interacts with the invert-
ing input capacitance, placing an additional pole in the
feedback network and thus, a zero in the forward response.
Assuming a 2pF total parasitic on the inverting node, hold-
ing R
F
|| R
G
< 300
will keep this pole above 250MHz. By
itself, this constraint implies that the feedback resistor R
F
can increase to several k
at high gains. This is acceptable
as long as the pole formed by R
F
and any parasitic capaci-
tance appearing in parallel is kept out of the frequency range
of interest.
BANDWIDTH VS GAIN: NON-INVERTING OPERATION
Voltage feedback op amps exhibit decreasing closed-loop
bandwidth as the signal gain is increased. In theory, this
relationship is described by the Gain Bandwidth Product
(GBP) shown in the specifications. Ideally, dividing GBP by
the non-inverting signal gain (also called the Noise Gain, or
NG) will predict the closed-loop bandwidth. In practice, this
only holds true when the phase margin approaches 90
°
, as it
does in high gain configurations. At low gains (increased
feedback factors), most amplifiers will exhibit a more com-
plex response with lower phase margin. The OPA680 is
compensated to give a slightly peaked response in a non-
inverting gain of 2 (Figure 1). This results in a typical gain
of +2 bandwidth of 220MHz, far exceeding that predicted
by dividing the 300MHz GBP by 2. Increasing the gain will
cause the phase margin to approach 90
°
and the bandwidth
to more closely approach the predicted value of (GBP/NG).
At a gain of +10, the 30MHz bandwidth shown in the
Typical Specifications agrees with that predicted using the
simple formula and the typical GBP of 300MHz.
Frequency response in a gain of +2 may be modified to
achieve exceptional flatness simply by increasing the noise
gain to 2.5. One way to do this, without affecting the +2
signal gain, is to add an 804
resistor across the two inputs
in the circuit of Figure 1. A similar technique may be used
FIGURE 8. Gain of –2 Example Circuit.
to reduce peaking in unity gain (voltage follower) applica-
tions. For example, by using a 402
feedback resistor along
with a 402
resistor across the two op amp inputs, the
voltage follower response will be similar to the gain of +2
response of Figure 2. Further reducing the value of the
resistor across the op amp inputs will further dampen the
frequency response due to increased noise gain.
The OPA680 exhibits minimal bandwidth reduction going
to single supply (+5V) operation as compared with
±
5V.
This is because the internal bias control circuitry retains
nearly constant quiescent current as the total supply voltage
between the supply pins is changed.
INVERTING AMPLIFIER OPERATION
Since the OPA680 is a general purpose, wideband voltage
feedback op amp, all of the familiar op amp application
circuits are available to the designer. Inverting operation is
one of the more common requirements and offers several
performance benefits. Figure 8 shows a typical inverting
configuration where the I/O impedances and signal gain
from Figure 1 are retained in an inverting circuit configura-
tion.
OPA680
50
R
F
402
R
G
200
R
G
146
R
M
67
Source
DIS
+5V
–5V
R
O
50
0.1μF
6.8μF
+
0.1μF
0.1μF
6.8μF
+
50
Load
In the inverting configuration, three key design consider-
ation must be noted. The first is that the gain resistor (R
G
)
becomes part of the signal channel input impedance. If input
impedance matching is desired (which is beneficial when-
ever the signal is coupled through a cable, twisted pair, long
PC board trace or other transmission line conductor), R
G
may be set equal to the required termination value and R
F
adjusted to give the desired gain. This is the simplest
approach and results in optimum bandwidth and noise per-
formance. However, at low inverting gains, the resultant
feedback resistor value can present a significant load to the