
15
OPA2652
any, as close as possible to the output pin. Other network
components, such as non-inverting input termination resis-
tors, should also be placed close to the package. Where
double-side component mounting is allowed, place the feed-
back resistor directly under the package on the other side of
the board between the output and inverting input pins. Even
with a low parasitic capacitance shunting the external resis-
tors, excessively high resistor values can create significant
time constants that can degrade performance. Good axial
metal film or surface-mount resistors have approximately
0.2pF in shunt with the resistor. For resistor values >1.5k
,
this parasitic capacitance can add a pole and/or zero below
500MHz that can effect circuit operation. Keep resistor
values as low as possible consistent with load driving con-
siderations. The 402
feedback used in the typical perfor-
mance specifications is a good starting point for design.
Note that a 25
feedback resistor, rather than a direct short,
is suggested for the unity gain follower application. This
effectively isolates the inverting input capacitance from the
output pin that would otherwise cause additional peaking in
the gain of +1 frequency response.
d)
Connections to other wideband devices
on the board
may be made with short direct traces or through on-board
transmission lines. For short connections, consider the trace
and the input to the next device as a lumped capacitive load.
Relatively wide traces (50 to 100mils) should be used,
preferably with ground and power planes opened up around
them. Estimate the total capacitive load and set R
S
from the
plot of Recommended R
S
vs Capacitive Load. Low parasitic
capacitive loads (<5pF) may not need an R
S
since the
OPA2652 is nominally compensated to operate with a 2pF
parasitic load. Higher parasitic capacitive loads without an
R
S
are allowed as the signal gain increases (increasing the
unloaded phase margin) If a long trace is required, and the
6dB signal loss intrinsic to a doubly terminated transmission
line is acceptable, implement a matched impedance trans-
mission line using microstrip or stripline techniques (consult
an ECL design handbook for microstrip and stripline layout
techniques). A 50
environment is normally not necessary
on board, and in fact, a higher impedance environment will
improve distortion as shown in the distortion versus load
plots. With a characteristic board trace impedance defined
(based on board material and trace dimensions), a matching
series resistor into the trace from the output of the OPA2652
is used as well as a terminating shunt resistor at the input of
the destination device. Remember also that the terminating
impedance will be the parallel combination of the shunt
resistor and the input impedance of the destination device;
this total effective impedance should be set to match the
trace impedance. The high output voltage and current capa-
bility of the OPA2652 allows multiple destination devices to
be handled as separate transmission lines, each with their
own series and shunt terminations. If the 6dB attenuation of
a doubly terminated transmission line is unacceptable, a
long trace can be series-terminated at the source end only.
Treat the trace as a capacitive load in this case and set the
series resistor value as shown in the plot of Recommended
R
S
vs Capacitive Load. This will not preserve signal integ-
rity as well as a doubly terminated line. If the input imped-
ance of the destination device is low, there will be some
signal attenuation due to the voltage divider formed by the
series output into the terminating impedance.
e)
Socketing a high speed part like the OPA2652 is not
recommended.
The additional lead length and pin-to-pin
capacitance introduced by the socket can create an ex-
tremely troublesome parasitic network which can make it
almost impossible to achieve a smooth, stable frequency
response. Best results are obtained by soldering the OPA2652
onto the board.
INPUT AND ESD PROTECTION
The OPA2652 is built using a very high speed complemen-
tary bipolar process. The internal junction breakdown volt-
ages are relatively low for these very small geometry de-
vices. These breakdowns are reflected in the “Absolute
Maximum Ratings” table. All device pins are protected with
internal ESD protection diodes to the power supplies as
shown in Figure 10.
These diodes provide moderate protection to input overdrive
voltages above the supplies as well. The protection diodes
can typically support 30mA continuous current. Where higher
currents are possible (e.g., in systems with
±
15V supply
parts driving into the OPA2652), current-limiting series
resistors should be added into the two inputs. Keep these
resistor values as low as possible since high values degrade
both noise performance and frequency response.
External
Pin
+V
CC
–V
CC
Internal
Circuitry
FIGURE 10. Internal ESD Protection.