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參數(shù)資料
| 型號(hào)： | OPA2357AIDGSR |
| 英文描述： | 250MHz, Rail-to-Rail I/O, CMOS Operational Amplifier with Shutdown |
| 中文描述： | 250MHz的，軌至軌I / O，CMOS運(yùn)算放大器具有關(guān)斷 |
| 文件頁數(shù)： | 17/23頁 |
| 文件大?。?/td> | 424K |
| 代理商： | OPA2357AIDGSR |
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SBOS235C MARCH 2002 REVISED MAY 2004
www.ti.com
17
PowerPAD THERMALLY ENHANCED
PACKAGE
The OPA357 uses the SO-8 PowerPAD package, a
thermally enhanced, standard size IC package designed
to eliminate the use of bulky heatsinks and slugs
traditionally used in thermal packages. This package can
be easily mounted using standard PCB assembly
techniques.
The PowerPAD package is designed so that the leadframe
die pad (or thermal pad) is exposed on the bottom of the
IC, as shown in Figure 10. This provides an extremely low
thermal resistance (
JC
) path between the die and the
exterior of the package. The thermal pad on the bottom of
the IC is then soldered directly to the PCB, using the PCB
as a heatsink. In addition, plated-through holes (vias)
provide a low thermal resistance heat flow path to the back
side of the PCB.
Mold Compound (Plastic)
LeadframeDiePad
Exposed at Baseof thePackage
(CopperAlloy)
Leadframe(Copper Alloy)
IC(Silicon)
DieAttach(Epoxy)
Figure 10. Section View of a PowerPAD Package
PowerPAD ASSEMBLY PROCESS
1. The PowerPAD must be connected to the device’s most
negative supply voltage, which will be ground in
single-supply applications, and V in splitsupply
applications.
2. Prepare the PCB with a top-side etch pattern, as shown
in Figure 11. The exact land design may vary based on the
specific assembly process requirements. There should be
etch for the leads as well as etch for the thermal land.
OPTIONAL:
Additional 4vias outside
of thermal padareabut
under thepackage.
REQUIRED:
Thermal padarea2.286mmx2.286mm
(90milsx90mils) with5 vias
(viadiameter = 13mils)
Thermal Land
(Copper)
MinimumSize
4.8mmx3.8mm
(189milsx150mils)
Figure 11. 8-Pin PowerPAD PCB Etch and Via
Pattern
3. Place the recommended number of plated-through
holes (or thermal vias) in the area of the thermal pad.
These holes should be 13 mils in diameter. They are kept
small so that solder wicking through the holes is not a
problem during reflow. The minimum recommended
number of holes for the SO-8 PowerPAD package is 5, as
shown in Figure 11.
4. It is recommended, but not required, to place a small
number of additional holes under the package and outside
the thermal pad area. These holes provide additional heat
paths between the copper thermal land and the ground
plane. They may be larger because they are not in the area
to be soldered, so wicking is not a problem. This is
illustrated in Figure 11.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| OPA2357AIDGSRG4 | 功能描述:高速運(yùn)算放大器 250MHz Rail-to-Rail I/O CMOS RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 電壓增益 dB:116 dB 輸入補(bǔ)償電壓:0.5 mV 轉(zhuǎn)換速度:55 V/us 工作電源電壓:36 V 電源電流:7.5 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
| OPA2357AIDGST | 功能描述:高速運(yùn)算放大器 250MHz Rail-to-Rail I/O CMOS RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 電壓增益 dB:116 dB 輸入補(bǔ)償電壓:0.5 mV 轉(zhuǎn)換速度:55 V/us 工作電源電壓:36 V 電源電流:7.5 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
| OPA2357AIDGST | 制造商:Texas Instruments 功能描述:IC OP AMP DUAL CMOS SMD MSOP10 |
| OPA2357AIDGSTG4 | 功能描述:高速運(yùn)算放大器 250MHz Rail-to-Rail I/O CMOS RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 電壓增益 dB:116 dB 輸入補(bǔ)償電壓:0.5 mV 轉(zhuǎn)換速度:55 V/us 工作電源電壓:36 V 電源電流:7.5 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
| OPA2363 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:1.8V, 7MHz, 90dB CMRR, SINGLE-SUPPLY, RAIL-TO-RAIL I/O OPERATIONAL AMPLIFIER |
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