OP279
–7–
REV. D
In order to achieve rail-to-rail output behavior, the OP279
design employs a complementary common-emitter (or g
m
R
L
)
output stage (Q15-Q16), as illustrated in Figure 23. T hese
amplifiers provide output current until they are forced into
saturation which occurs at approximately 50 mV from either
supply rail. T hus, their saturation voltage is the limit on the
maximum output voltage swing in the OP279. T he output
stage also exhibits voltage gain, by virtue of the use of common-
emitter amplifiers; and, as a result, the voltage gain of the out-
put stage (thus, the open-loop gain of the device) exhibits a
strong dependence to the total load resistance at the output of
the OP279 as illustrated in Figure 7.
Q7
Q3
Q15
Q9
105
V
V
POS
V
NEG
Q13
V
OUT
Q4
Q16
I3
I4
Q11
Q12
Q5
Q10
I2
Q1
Q2
I1
Q8
Q6
105
V
Q14
150
V
Figure 23. OP279 Equivalent Output Circuit
Input Overvoltage Protection
As with any semiconductor device, whenever the condition
exists for the input to exceed either supply voltage, the device’s
input overvoltage characteristic must be considered. When an
overvoltage occurs, the amplifier could be damaged depending
on the magnitude of the applied voltage and the magnitude of
the fault current. Figure 24 illustrates the input overvoltage
characteristic of the OP279. T his graph was generated with the
power supplies at ground and a curve tracer connected to the
input. As can be seen, when the input voltage exceeds either
supply by more than 0.6 V, internal pn-junctions energize which
allow current to flow from the input to the supplies. As illus-
trated in the simplified equivalent input circuit (Figure 22), the
OP279 does not have any internal current limiting resistors, so
fault currents can quickly rise to damaging levels.
T his input current is not inherently damaging to the device as
long as it is limited to 5 mA or less. For the OP279, once the
input voltage exceeds the supply by more than 0.6 V, the input
current quickly exceeds 5 mA. If this condition continues to
exist, an external series resistor should be added. T he size of
the resistor is calculated by dividing the maximum overvoltage
by 5 mA. For example, if the input voltage could reach 100 V,
the external resistor should be (100 V/5 mA) = 20 k
. T his
resistance should be placed in series with either or both inputs if
they are exposed to an overvoltage. Again, in order to ensure
optimum dc and ac performance, it is important to balance
source impedance levels. For more information on general
overvoltage characteristics of amplifiers refer to the
1993
Seminar Applications Guide,
available from the Analog Devices
Literature Center.
5
–3
–5
–2.0
–4
1
–2
–1
2
3
4
2.0
1.0
0
–1.0
0
I
INPUT VOLTAGE – V
Figure 24. OP279 Input Overvoltage Characteristic
Output Phase Reversal
Some operational amplifiers designed for single-supply opera-
tion exhibit an output voltage phase reversal when their inputs
are driven beyond their useful common-mode range. T ypically
for single-supply bipolar op amps, the negative supply deter-
mines the lower limit of their common-mode range. With these
devices, external clamping diodes, with the anode connected to
ground and the cathode to the inputs, prevent input signal
excursions from exceeding the device’s negative supply (i.e.,
GND), preventing a condition that could cause the output
voltage to change phase. JFET -input amplifiers may also
exhibit phase reversal, and, if so, a series input resistor is usually
required to prevent it.
T he OP279 is free from reasonable input voltage range restric-
tions provided that the input voltages no greater than the supply
voltages are applied. Although the device’s output will not
change phase, large currents can flow through the input protec-
tion diodes, previously shown in Figure 22. T herefore, the
technique recommended in the “Input Overvoltage Protection”
section should be applied in those applications where the likeli-
hood of input voltages exceeding the supply voltages is possible.
Capacitive Load Drive
T he OP279 has excellent capacitive load driving capabilities. It
can drive up to 10 nF directly as the performance graph titled
“Small Signal Overshoot vs. Load Capacitance” (Figure 18)
shows. However, even though the device is stable, a capacitive
load does not come without a penalty in bandwidth. As shown
in Figure 25, the bandwidth is reduced to under 1 MHz for
loads greater than 3 nF. A “snubber” network on the output
won’t increase the bandwidth, but it does significantly reduce
the amount of overshoot for a given capacitive load. A snubber
consists of a series R-C network (R
S
, C
S
), as shown in Figure
26, connected from the output of the device to ground. T his
network operates in parallel with the load capacitor, C
L
, to
provide phase lag compensation. T he actual value of the resis-
tor and capacitor is best determined empirically.