參數資料
型號： OM6218SP1
英文描述： TRANSISTOR | MOSFET | MATCHED PAIR | N-CHANNEL | 60V V(BR)DSS | 20A I(D) | SIP
中文描述： 晶體管| MOSFET的|配對| N溝道| 60V的五（巴西）直| 20A條（?。﹟園區(qū)
文件頁數： 5/40頁
文件大小： 213K
代理商： OM6218SP1
2001 Nov 07
5
Philips Semiconductors
Product specification
48
×
84 pixels matrix LCD driver
OM6213
6
PINNING
SYMBOL
PAD
DESCRIPTION
V
OS4
V
OS3
V
OS2
V
OS1
V
OS0
V
DD1
V
DD3
V
DD2
SCLK
T7
3
4
5
6
7
V
LCD
offset pad 0 input
V
LCD
offset pad 1 input
V
LCD
offset pad 2 input
V
LCD
offset pad 3 input
V
LCD
offset pad 4 input
supply voltage 1
supply voltage 3
supply voltage 2
serial clock input
test 7 alternative HV-gen
programming input
serial data input and HV-gen
programming input
data/command input
chip enable input (active
LOW)
oscillator input
ground 2
test 4 input
test 5 input
test 6 output
ground 1
13 to 18
19 to 22
23 to 30
31
32 to 35
SDIN
36 to 39
D/C
SCE
40
41
OSC
V
SS2
T4
T5
T6
V
SS1
42
43 to 50
51
52
53
54 to 61
T1
T2
T3
V
LCDIN
62
63
64
test 1 output
test 2 output
test 3 output
V
LCD
supply voltage input and
HV-gen programming input
V
LCD
generator output
V
LCD
generator regulation
input
reset input (active LOW)
LCD row driver outputs
65 to 70
V
LCDOUT
V
LCDSENSE
71 to 77
78
RES
ROW 11 to
ROW 0
ROW 12 to
ROW 23
COL 0 to
COL 83
ROW 47 to
ROW 36
ROW 24 to
ROW 35
79
89 to 100
101 to 112 LCD row driver outputs
113 to 196 LCD column driver outputs
197 to 208 LCD row driver outputs
209 to 220 LCD row driver outputs
1, 8 to 12,
81 to 88,
221 and
222
dummy pads
SYMBOL
PAD
DESCRIPTION
7
PIN FUNCTIONS
7.1
ROW 0 to ROW 47 row driver outputs
These pads output the row signals.
7.2
COL 0 to COL 83 column driver outputs
These pads output the column signals.
7.3
V
SS1
and V
SS2
: negative power supply rails
V
SS1
andV
SS2
mustbeconnectedtogether,jointlyreferred
to as V
SS
. When a pin has to be connected externally to
V
SS
, V
SS1
should be used.
7.4
V
DD1
to V
DD3
: positive power supply rails
V
DD1
provides the logic supply. V
DD2
and V
DD3
provide the
analog supply; jointly referred to as V
DD2
. V
DD2
and V
DD3
must be connected together.
7.5
V
LCDOUT,
V
LCDIN
and V
LCDSENSE
: LCD power
supplies
If the internal V
LCD
generator is used, then all 3 pins must
be connected together. If not (the internal V
LCD
generator
is disabled and an external voltage is supplied at pin
V
LCDIN
), V
LCDOUT
must be left open-circuit and V
LCDSENSE
must be connected to V
LCDIN
. V
PR
must be set to logic 0 to
switch-off the charge pump if an external V
LCD
generator
is used. V
LCDIN
is also used for HV-gen programming.
7.6
V
OS0
to V
OS4
Five input pins for on-glass V
LCD
offset. Each pin must be
connected to V
SS1
, which corresponds to logic 0, or to
V
DD1
, which corresponds to logic 1. All five pins define a
5-bit two’s complement number ranging from
16 to +15
decimal (from 10000 to 01111). The default value, with all
pins connected to V
SS1
, is 0 decimal (00000). The register
is refreshed by each set bias system command or when
exiting the Power-down mode.
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相關代理商/技術參數
參數描述
OM6219SP1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRANSISTOR | MOSFET | MATCHED PAIR | N-CHANNEL | 100V V(BR)DSS | 30A I(D) | SIP
OM6220SP1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRANSISTOR | MOSFET | MATCHED PAIR | N-CHANNEL | 200V V(BR)DSS | 25A I(D) | SIP
OM6221SP1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRANSISTOR | MOSFET | MATCHED PAIR | N-CHANNEL | 500V V(BR)DSS | 12A I(D) | SIP
OM6222SP1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRANSISTOR | MOSFET | MATCHED PAIR | N-CHANNEL | 1KV V(BR)DSS | 4A I(D) | SIP
OM6223SP2 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRANSISTOR | MOSFET | N-CHANNEL | 100V V(BR)DSS | 30A I(D) | SIP
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