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| 型號(hào)： | OM5232 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | CMOS single-chip 8-bit microcontroller |
| 中文描述： | CMOS單芯片8位微控制器 |
| 文件頁(yè)數(shù)： | 7/11頁(yè) |
| 文件大?。?/td> | 175K |
| 代理商： | OM5232 |
Philips Semiconductors
Product specification
OM5232
CMOS single-chip 8-bit microcontroller
December 1994
7
DC ELECTRICAL CHARACTERISTICS
V
SS
= 0V, V
DD
= 5.0V
±
10%. Operating temperature range 0 to 70
°
C.
TEST
LIMITS
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
IL
Input low voltage,
except EA, P1.6, P1.7
–0.5
0.2V
DD
–0.1
0.2V
DD
–0.3
0.3V
DD
V
DD
+0.5
V
DD
+0.5
6.0
V
V
IL1
V
IL2
V
IH
V
IH1
V
IH2
V
OL
V
OL1
V
OL2
V
OH
Input low voltage to EA
–0.5
V
Input low voltage to P1.6, P1.7
–0.5
V
Input high voltage, except XTAL1, RST, P1.6, P1.7
0.2V
DD
+0.9
0.7V
DD
0.7V
DD
V
Input high voltage, XTAL1, RST
V
Input high voltage, P1.6, P1.7
V
Output low voltage, ports 1, 2, 3, except P1.6, P1.7
I
OL
= 1.6mA
7), 8)
I
OL
= 3.2mA
7), 8)
I
OL
= 3.0mA
I
OH
= –60
μ
A
I
OH
= –25
μ
A
I
OH
= –10
μ
A
I
OH
= –800
μ
A
I
OH
= –300
μ
A
I
OH
= –80
μ
A
V
IN
= 0.45V
See note 6)
0.45
V
Output low voltage, port 0, ALE, PSEN
0.45
V
Output low voltage, P1.6, P1.7
Output high voltage, ports 1, 2, 3, ALE, PSEN
9)
0.4
V
2.4
V
V
V
0.75V
DD
0.9V
DD
2.4
0.75V
DD
0.9V
DD
V
OH1
Output high voltage; port 0 in external bus mode
V
V
V
I
IL
I
TL
Logical 0 input current, ports 1, 2, 3, except P1.6, P1.7
–50
μ
A
μ
A
Logical 1-to-0 transition current, ports 1, 2, 3,
except P1.6, P1.7
–650
I
L1
I
L2
Input leakage current, port 0, EA
0.45V < V
I
< V
DD
0V < V
I
< 6.0V
0V < V
DD
< 6.0V
See note 1)
V
DD
=6.0V
±
10
±
10
μ
A
μ
A
Input leakage current, P1.6, P1.7
I
DD
Power supply current:
Active mode @ 16MHz
2), 10)
Idle mode @ 16MHz
3), 10)
Power down mode
4), 5)
26.5
6
50
mA
mA
μ
A
k
R
RST
C
IO
Internal reset pull-down resistor
50
150
Pin capacitance
Freq.=1MHz
10
pF
NOTES FOR DC ELECTRICAL CHARACTERISTICS:
1. See Figures 9 through 11 for I
DD
test conditions.
2. The operating supply current is measured with all output pins disconnected; XTAL1 driven with t
r
= t
f
= 5ns;
V
IL
= V
SS
+ 0.5V; V
IH
= V
DD
–0.5V; XTAL2 not connected; EA = RST = Port 0 = P1.6 = P1.7 = V
DD
. See Figure 9.
3. The idle mode supply current is measured with all output pins disconnected; XTAL1 driven with t
r
= t
f
= 5ns; V
IL
= V
SS
+ 0.5V;
V
IH
= V
DD
–0.5V; XTAL2 not connected; Port 0 = P1.6 = P1.7 = V
DD
; EA = RST = V
SS
. See Figure 10.
4. The power-down current is measured with all output pins disconnected; XTAL2 not connected; Port 0 = P1.6 = P1.7 = V
DD
;
EA = RST = V
SS
. See Figure 11.
5. 2V
≤
V
≤
V
max.
6. Pins of ports 1 , 2, and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its
maximum value when V
IN
is approximately 2V.
7. Capacitive loading on ports 0 and 2 may cause spurious noise to be superimposed on the V
OL
s of ALE and ports 1 and 3. The noise is due
to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1-to-0 transitions during bus operations. In the
worst cases (capacitive loading > 100pF), the noise pulse on the ALE pin may exceed 0.8V. In such cases, it may be desirable to qualify
ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input.
8. Under steady state (non-transient) conditions, I
OL
must be externally limited as follows: Maximum I
OL
= 10mA per port pin; Maximum
I
= 26mA total for Port 0; Maximum I
= 15mA total for Ports 1, 2, and 3; Maximum I
= 71mA total for all output pins. If I
exceeds the
test conditions, V
may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test conditions.
9. Capacitive loading on ports 0 and 2 may cause the V
OH
on ALE and PSEN to momentarily fall below the 0.9V
DD
specification when the
address bits are stabilizing.
10.I
DDMAX
for other frequencies can be derived from Figure 1, where FREQ is the external oscillator frequency in MHz. I
DDMAX
is given in mA.
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