參數(shù)資料
型號(hào): NTE1757
廠商: NTE Electronics, Inc.
英文描述: Integrated Circuit Remote Control Receiver
中文描述: 集成電路遙控接收器
文件頁(yè)數(shù): 2/3頁(yè)
文件大?。?/td> 35K
代理商: NTE1757
Pin Functions:
Positive Logic: Logic “1” = V
SS
, 0V Logic “0” = V
DD
, 16V
1.
Oscillator TC
An RC time constant at this pin defines the internal clock frequency. The clock frequency may be varied
from 15Hz to 150kHz.
2. PPM Input
The output of the front end amplifier is connected to this pin; the signal must consist of a normal logic
0
level with pulses to logic
1
.
3–8. Control Word C
0
to C
5
Six control bits form the control word which programs the response of the five outputs. (See
Table 1).
9. V
DD
12V to
18V Power Supply.
10. Data Ready
Open drain output. An output of logic
1
indicates the reception of a valid PPM word. It will remain at
logic
1
for the duration of transmission.
11. Power Clear
A capacitor and resistor connected to this pin define the time delay for the power clear circuit.
12–16. Outputs E–A
Open drain outputs which respond to the PPM input as defined in Table 1.
17. Output Enable
A logic
1
will enable outputs A to E. A logic
0
will turn all outputs off.
18. V
SS
0V (Ground).
Operating Notes:
The receiver operates on a time scale fixed by an internal oscillator and its external timing components. The oscillator
may be adjusted to any value between 15Hz and 150kHz (allowing different receivers to respond to different transmission
rates within the same area).
A counter is reset whenever a pulse is received and allowed to count at half the oscillator frequency. For example, at an
oscillator frequency of 1.5kHz, resetting is blocked for the first 14ms and windows from 22ms to 40ms determine whether
a
1
or
0
is present. Periods between pulses of 40ms to 80ms are recognized as word intervals. Checks are made to
ensure 6 pulses of 5 bits, are received for a word to be valid, and only after two consecutive and identical words is the
receiver allowed to respond to the incoming code.
By means of the six control lines, the outputs can respond to the PPM input data in three ways:
1.
5 bit binary output with combinations of latched or momentary output as shown in Table 1.
2.
4 independent outputs with combinations of latched or momentary output as shown in Table 1. Any output on 1 or
4 receivers can be addressed by each PPM word.
3.
The PPM word can be an address or data depending on the logic state of bit
e
. If PPM bit
e
is
0
, the remaining
four bits (
a
,
b
,
c
, and
d
) control the outputs A to D. Outputs can be all latched or all momentary.
Table 1:
Control Word
C3
0
0
0
0
1
1
1
0
0
1
Control
Mode
Output Response
D
C
LA
LA
LA
LA
LA
LA
LA
M
M
M
M
M
S/R
S/R
S/R
S/R
S/R
S/R
S/R
M
Interpretation pf PPM Words
b
a
B
A
C5
0
0
0
0
0
0
0
0
0
0
C4
0
0
0
0
0
1
0
1
1
1
C2
0
0
0
1
1
1
0
0
1
0
C1
0
0
1
1
1
1
Z
Z
Z
Z
C0
0
1
1
1
1
1
Z
Z
Z
Z
E
LA
LA
LA
LA
LA
M
B
LA
LA
M
M
M
M
S/R
S/R
M
M
A
LA
M
M
M
M
M
S/R
M
M
M
e
E
d
D
c
C
e
d
c
b
a
1
1
1
1
1
1
2
2
2
2
PPM decoded
on all outputs
immediately
0
Y
Y
Z
Z
1
Y
Y
Z
Z
Output
address
Receiver
address
Output
address
Receiver
address
Sets an S/R type
output or pulses a
momentary output
Resets an S/R
type output
1
1
0
1
Z
Z
Z
Z
Z
Z
Z
Z
3
3
LA
M
LA
M
LA
M
LA
M
0
Z
Z
Z
Z
1
D
C
B
A
Address
mode
Receiver
address
Data
mode
PPM data sent
to outputs of
addressed
receiver
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