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參數(shù)資料
| 型號(hào)： | NT68275 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | IIC Bus Controlled On-Screen Display |
| 中文描述： | IIC總線控制屏幕顯示 |
| 文件頁數(shù)： | 17/38頁 |
| 文件大小： | 1389K |
| 代理商： | NT68275 |
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NT68275
17
(6) Flexible Display Control Register : Row 15 , Column 15
7
6
5
4
3
2
1
0
HDR
Row 15
Column 15 MSB
LSB
Horizontal Display Resolution Control
Bit 6-0: HDR
-These bits determine the resolution of the horizontal display line. The unit of this setting is
twelve dots (one character). With total 92 steps ($24 ~ $7F: 36 ~ 127 steps; value cannot be smaller
than 36 anytime.), user can adjust the resolution from 36 to 127 characters on each horizontal line.
Note that the resolution adjustment must cooperate with the VCO setting at row 15 / column 18 control
register. Refer to the table of the control register at row 15 / column 18. The default value of it is 40 after
power on.
(7) OSD Row to Row Space Control Register : Row 15 , Column 16
7
6
5
4
3
2
1
0
R2RSPACE
Row 15
Column 16
MSB
LSB
Row To Row Space Adjustment
Bit 4-0: R2RSPACE
- These bits define the row-to-row spacing in units of horizontal lines. Extra lines defined by
this 5-bit value will be appended for each display row. The default value is 0 after power on and there is
no extra line inserted between rows. All of these bits will be cleared to ‘0’ after power on.
(8) Input/Output Control Register : Row 15 , Column 17
7
6
5
4
3
2
1
0
Row 15
Column 17
OSDEN BSEN
SHADOW
FADE
BLANK CLRWIN CLRDSPR FBKGC
OSD Screen Control 1
Bit 7: OSDEN
– This bit will enable the OSD circuit when it is set to ‘1’. The default value is ‘0’ after power on.
Bit 6: BSEN
– This bit will enable the bordering and shadowing effect when it is set to ‘1’. The default value is
‘0’ after power on.
Bit 5: SHADOW
– When the BSEN set to ‘1’, it will enable the shadowing effect when this bit set to ‘1’, too.
Otherwise, it will enable the bordering effect as this bit is cleared to ‘0’. The default value is ‘0’ after power
on.
Bit 4: FADE
- This bit enables the fade-in/out effect when the OSD screen is turned on by setting from OSDEN
= ’0’ to ‘1’ or turned off by setting from OSDEN = ’1’ to ‘0’. The fade-in/out effect will be completed about
0.5 seconds when the input Vsync is 60 Hz. The default value of this bit is ‘0’ after power on.
Bit 3: BLANK
– This bit will force the FBKG pin to output high when this bit & the FBKGOP are bit set to ‘1’.
Otherwise, the FBKG pin will output low when this bit is set to ‘1’ & FBKGOP bit set to ‘0’. The default value
of this bit is ‘0’ after power on.
Bit 2: CLRWIN
– This bit will clear all windows’ WINEN control bit as it is set to ‘1’. The default value of this bit
is ‘0’ after power on.
Bit 1: CLRDSPR
– This bit will clear all of the content in the display registers and R, G, G, BLNK bit in the
character attribute registers when it is set to ‘1’. The default value of this bit is ‘0’ after power on.
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PDF描述 |
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| NT68520XF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:XGA,SXGA Flat Panel Monitor Controller |
| NT6861 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller for Monitor |
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