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參數(shù)資料
| 型號： | NT128D64S88A0G-75B |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 184pin One Bank Unbuffered DDR SDRAM MODULE |
| 中文描述： | 一位銀行無緩沖184pin DDR SDRAM內(nèi)存模塊 |
| 文件頁數(shù)： | 9/15頁 |
| 文件大小： | 191K |
| 代理商： | NT128D64S88A0G-75B |
NT128D64S88A0G
128MB : 16M x 64
PC2100 / PC1600 Unbuffered DIMM
AC Characteristics
(Notes 1-5 apply to the following Tables; Electrical Characteristics and DC Operating Conditions, AC Operating
Conditions, Operating, Standby, and Refresh Currents, and Electrical Characteristics and AC Timing.)
1. All voltages referenced to V SS .
2. Tests for AC timing, IDD , and electrical, AC and DC characteristics, may be conducted at nominal reference/supply voltage levels, but
the related specifications and device operation are guaranteed for the full voltage range specified.
3. Outputs measured with equivalent load. Refer to the AC Output Load Circuit below.
4. AC timing and I DD tests may use a V
IL
to V
IH
swing of up to 1.5V in the test environment, but input timing is still referenced to V
REF
(or to the crossing point for CK, CK), and parameter specifications are guaranteed for the specified AC input levels under normal use
conditions. The minimum slew rate for the input signals is 1V/ns in the range between V
IL(AC)
and V
IH(AC)
unless otherwise specified.
5. The AC and DC input level specifications are as defined in the SSTL_2 Standard (i.e. the receiver effectively switches as a result of the
signal crossing the AC input level, and remains in that state as long as the signal does not ring back above (below) the DC input LOW
(HIGH) level.
AC Output Load Circuits
REV1.0
/
June 2001
9
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
Timing Reference Point
V
TT
50 ohms
30 pF
Output
V
OUT
AC Operating Conditions
( TA = 0 °C ~ 70 °C ; VDDQ = 2.5V ± 0.2V; VDD = 2.5V ± 0.2V, See AC Characteristics)
Symbol
V
IH(AC)
Input High (Logic 1) Voltage.
Parameter/Condition
Min
Max
Unit
V
Notes
1, 2
V
REF
+ 0.31
V
IL(AC)
Input Low (Logic 0) Voltage.
V
REF
0.31
V
1, 2
V
ID(AC)
Input Differential Voltage, CK and
CK
Inputs
V
IX(AC)
Input Differential Pair Cross Point Voltage, CK and
CK
Inputs
1. Input slew rate = 1V/ ns .
2. Inputs are not recognized as valid until V
REF
stabilizes.
3. V
ID
is the magnitude of the difference between the input level on CK and the input level on CK.
4. The value of V
IX
is expected to equal 0.5*V
DDQ
of the transmitting device and must track variations in the DC level of the same.
0.62
V
DDQ
+ 0.6
V
V
1, 2, 3
1, 2, 4
(0.5*V
DDQ
) - 0.2
(0.5*V
DDQ
) +0.2
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相關代理商/技術參數(shù) |
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| NT128D64S88A0G-7K | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:184pin One Bank Unbuffered DDR SDRAM MODULE |
| NT128D64S88A0G-8B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:184pin One Bank Unbuffered DDR SDRAM MODULE |
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| NT128D64SH4B1G-5T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:184 pin Unbuffered DDR DIMM |
| NT128D64SH4B1G-6K | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:184 pin Unbuffered DDR DIMM |
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