參數(shù)資料
型號: NLSF3T12
廠商: ON SEMICONDUCTOR
英文描述: Quad Bus Buffer
中文描述: 四總線緩沖器
文件頁數(shù): 2/8頁
文件大?。?/td> 70K
代理商: NLSF3T12
NLSF3T125
http://onsemi.com
2
Figure 2. QFN 16 Pinout (Top View)
Y2
GND
Y3
A3
A1
OE1 V
CC
OE4
A4
Y4
Y1
NC
OE2
A2
NC
OE3
Exposed Pad (EP)
1
3
4
5
6
7
8
9
10
11
12
13
14
15
16
2
should be restricted to the Recommended Operating Conditions.
mA
mA
mA
V
DC Input Voltage
– 0.5 to + 7.0
V
I
IK
I
OK
I
out
Input Diode Current
Output Diode Current (V
OUT
< GND; V
OUT
> V
CC
)
DC Output Current, per Pin
20
High or Low State
CC
±
20
±
25
I
CC
DC Supply Current, V
CC
and GND Pins
±
75
mA
P
D
Power Dissipation in Still Air,
QFN Packages
500
mW
T
stg
Storage Temperature
– 65 to + 150
°
C
CC
out
High or Low State
DC Output Voltage
Output in 3State
0
V
CC
5.5
t
, t
Input Rise and Fall Time
V
= 5.0 V
±
0.5 V
0
20
ns/V
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this highimpedance cir-
cuit. For proper operation, V
in
and
V
out
should be constrained to the
range GND
(V
in
or V
out
)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V
CC
).
Unused outputs must be left open.
V
CC
.
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