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參數(shù)資料
| 型號(hào)： | NLSF3T12 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | Quad Bus Buffer |
| 中文描述： | 四總線緩沖器 |
| 文件頁(yè)數(shù)： | 1/8頁(yè) |
| 文件大小： | 70K |
| 代理商： | NLSF3T12 |
Semiconductor Components Industries, LLC, 2004
March, 2004 Rev. 2
1
Publication Order Number:
NLSF3T125/D
NLSF3T125
Quad Bus Buffer
with 3State Control Inputs
The NLSF3T125 is a high speed CMOS quad bus buffer fabricated
with silicon gate CMOS technology. It achieves high speed operation
similar to equivalent Bipolar Schottky TTL while maintaining CMOS
low power dissipation.
The NLSF3T125 requires the 3state control input (OE) to be set
High to place the output into the high impedance state.
The T125 inputs are compatible with TTL levels. This device can be
used as a level converter for interfacing 3.3 V to 5.0 V, because it has
full 5.0 V CMOS level output swings.
The NLSF3T125 input structures provide protection when voltages
between 0 V and 5.5 V are applied, regardless of the supply voltage.
The output structures also provide protection when V
CC
= 0 V. These
input and output structures help prevent device destruction caused by
supply voltage input/output voltage mismatch, battery backup, hot
insertion, etc.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
High Speed: t
PD
= 3.8 ns (Typ) at V
CC
= 5.0 V
Low Power Dissipation: I
CC
= 4.0 A (Max) at T
A
= 25
°
C
TTLCompatible Inputs: V
IL
= 0.8 V; V
IH
= 2.0 V
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2.0 V to 5.5 V Operating Range
Low Noise: V
OLP
= 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance: Human Body Model; > 2000 V,
Machine Model; > 200 V
Chip Complexity: 72 FETs or 18 Equivalent Gates
Figure 1. Logic Diagram
ActiveLow Output Enables
Y1
Y2
Y4
1
5
7
10
13
12
8
9
4
3
15
16
A1
OE1
A2
OE2
A3
OE3
A4
OE4
Y3
FUNCTION TABLE
NLSF3T125
Inputs
A
OE
Output
Y
H
L
X
L
L
H
H
L
Z
Device
Package
Shipping
ORDERING INFORMATION
NLSF3T125MNR2
QFN16
3000 Units/
Tape & Reel
http://onsemi.com
16
XXX
ALYW
1
MARKING
DIAGRAM
A
WL = Wafer Lot
Y
= Year
WW = Work Week
= Assembly Location
QFN16
CASE 485G
.
(Top View)
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NLSF3T125 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Quad Bus Buffer |
| NLSF3T125/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad Bus Buffer |
| NLSF3T125_11 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Quad Bus Buffer |
| NLSF3T125MNR2 | 功能描述:緩沖器和線路驅(qū)動(dòng)器 2-5.5V Quad Bus RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| NLSF3T125MNR2G | 功能描述:緩沖器和線路驅(qū)動(dòng)器 2-5.5V Quad Bus 4 State Control Inp. RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
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