參數(shù)資料
型號(hào): NCV7380
廠商: ON SEMICONDUCTOR
英文描述: LIN Transceiver(LIN收發(fā)器)
中文描述: LIN收發(fā)器(林收發(fā)器)
文件頁(yè)數(shù): 8/14頁(yè)
文件大?。?/td> 108K
代理商: NCV7380
NCV7380
http://onsemi.com
8
Functional Description
Initialization
After
power on,
the chip automatically enters the
recessive state (TxD = Open). Both V
CC
and V
S
must
be present.
Operating Modes
All operation modes will be handled from the
NCV7380 automatically.
Normal Mode
After power on, the IC switches automatically to normal
mode. Bus communication is possible. If there is no
communication on the bus line the power consumption of
the
IC
is
very
low
microprocessor control.
and
does
not
require
Thermal Shutdown Mode
If the junction temperature T
J
is higher than 155
°
C, the
NCV7380 could be switched into the thermal shutdown
mode (bus driver will be switched off, receiver is on).
If T
J
falls below the thermal shutdown temperature
(typical 140
°
C) the NCV7380 will be switched to the
normal mode.
LIN BUS Transceiver
The transceiver consists of a busdriver (1.2 V @
40 mA) with slew rate control and current limit, and a
receiver with a high voltage comparator with
filter circuitry.
BUS Input/Output
The recessive BUS level is generated from the integrated
30 k pullup resistor in series with a diode. The diode
prevents reverse current on V
BUS
when V
BUS
> V
S
.
No additional termination resistor is necessary to use the
NCV7380 on LIN slave nodes. If this IC is used for LIN
master nodes, it is necessary to terminate the bus with an
external 1.0 k resistor in series with a diode to VBAT
(Figure 9).
TxD Input
During transmission the signal on TxD
will be
transferred to the BUS driver for generating a BUS signal.
To minimize the electromagnetic emission of the bus line,
the BUS driver has integrated slew rate control and
wave shaping.
Transmitting will be interrupted if thermal shutdown
is active.
The CMOS compatible input TxD directly controls the
BUS level:
TxD = low
BUS = low (dominant level)
TxD = high
BUS = high (recessive level)
The TxD pin has an internal pullup resistor connected to
V
CC
. This secures that an open TxD pin generates a
recessive BUS level.
RxD Output
The signal on the BUS pin will be transferred
continuously to the RxD pin. Short spikes on the bus signal
are filtered with internal circuitry (Figure 3 and Figure 6).
Figure 6. Receive Impulse Diagram
60%
t < t
rec_deb
VS
RxD
40%
t < t
rec_deb
BUS
50%
V
BUS_CNT_max
V
BUS_CNT_min
V
hHYS
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