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參數(shù)資料
| 型號(hào)： | NCP3488DR2G |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | MOSFETs |
| 英文描述： | MOSFET Driver with Dual Outputs for Synchronous Buck Converters |
| 中文描述： | HALF BRDG BASED MOSFET DRIVER, PDSO8 |
| 封裝： | LEAD FREE, SOP-8 |
| 文件頁(yè)數(shù)： | 2/7頁(yè) |
| 文件大?。?/td> | 144K |
| 代理商： | NCP3488DR2G |
NCP3488
http://onsemi.com
2
Figure 1. Block Diagram
8
1
4
7
5
6
2
3
V
CC
DRVH
BST
SWN
DRVL
PGND
OD
IN
TSD
UVLO
V
CC
MONITOR
FALLING
EDGE
DELAY
MONITOR
FALLING
EDGE
DELAY
NON
OVERLAP
TIMERS
MIN DRVL
OFF TIMER
START
STOP
PIN DESCRIPTION
Pin No.
Symbol
Description
1
BST
Upper MOSFET Floating Bootstrap Supply. A capacitor connected between BST and SW pins holds this
bootstrap voltage for the high
side MOSFET as it is switched. The recommended capacitor value is between
100 nF and 1.0 F. An external diode is required with the NCP3488.
2
IN
Logic
Level Input. This pin has primary control of the drive outputs.
3
OD
Output Disable. When low, normal operation is disabled forcing DRVH and DRVL low.
4
V
CC
Input Supply. A 1.0 F ceramic capacitor should be connected from this pin to PGND.
5
DRVL
Output drive for the lower MOSFET.
6
PGND
Power Ground. Should be closely connected to the source of the lower MOSFET.
7
SWN
Switch Node. Connect to the source of the upper MOSFET.
8
DRVH
Output drive for the upper MOSFET.
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