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參數(shù)資料
| 型號(hào)： | NCP2809BGEVB |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 6/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR NCP2809B |
| 設(shè)計(jì)資源： | NCP2809B Demo Brd Schematic NCP2809B EVB BOM NCP2809BGEVB Gerber Files |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | NOCAP™ |
| 放大器類型： | AB 類 |
| 輸出類型： | 耳機(jī)，2-通道（立體聲） |
| 在某負(fù)載時(shí)最大輸出功率 x 通道數(shù)量： | 135mW x 2 @ 16 歐姆 |
| 電源電壓： | 2.2 V ~ 5.5 V |
| 板類型： | 完全填充 |
| 已用 IC / 零件： | NCP2809 |
| 已供物品： | 板 |
| 其它名稱： | NCP2809BEVBOS NCP2809BEVBOS-ND NCP2809BGEVBOS |
NCP2809 Series
http://onsemi.com
14
APPLICATION INFORMATION
Detailed Description
The NCP2809 power audio amplifier can operate from
2.6 V to 5.0 V power supply. It delivers 24 mWrms output
power to a 16
W load (VP = 2.4 V) and 131 mWrms output
power to a 16
W load (VP = 5.0 V).
The structure of NCP2809 is basically composed of two
identical internal power amplifiers; NCP2809A has a fixed
internal gain of 0 dB and the gain can be set externally with
the NCP2809B.
Internal Power Amplifier
The output Pmos and Nmos transistors of the amplifier are
designed to deliver the specified output power without
clipping. The channel resistance (Ron) of the Nmos and Pmos
transistors does not exceed 3.0
W when driving current.
The structure of the internal power amplifier is
composed of three symmetrical gain stages, first and
medium gain stages are transconductance gain stages in
order to maximize bandwidth and DC gain.
TurnOn and TurnOff Transitions
A Turnon/off transition is shown in the following plot
In order to eliminate “pop and click” noises during
transitions, output power in the load must be slowly
established or cut. When logic high is applied to the
shutdown pin, the bypass voltage begins to rise
exponentially and once the output DC level is around the
common mode voltage, the gain is established slowly
(50 ms). This way to turnon the device is optimized in
terms of rejection of “pop and click” noises.
A theoretical value of turnon time at 25
°C is given by
the following formula.
Cby: Bypass Capacitor
R: Internal 300 k resistor with a 25% accuracy
Ton = 0.95 * R * Cby
When logic is turned low on shutdown pin, the device
enters in shutdown mode:
50 ms later the audio signal is cut off as the gain is
turned to zero internally as shown in Figure 41.
385 ms later, the DC signal will reach 0.7 V due to
exponential discharge of the bypass voltage. It is then tied
to Ground as shown in Figure 40.
A theoretical approach of this time is:
Toff = R * Cby * Ln(Vp/1.4)
Shutdown Function
The device enters shutdown mode when shutdown signal
is low. During the shutdown mode, the DC quiescent
current of the circuit does not exceed 600 nA.
Current Limit Protection Circuitry
The maximum output power of the circuit (POrms =
135 mW, VP = 5.0 V, RL = 16 W) requires a peak current in
the load of 130 mA.
In order to limit excessive power dissipation in the load
when a shortcircuit occurs, the current limit in the load is
fixed to 250 mA. The current in the output MOS transistors
is realtime monitored, and when exceeding 250 mA, the
gate voltage of the corresponding MOS transistor is clipped
and no more current can be delivered.
Thermal Overload Protection Circuitry
Internal amplifiers are switched off when temperature
exceeds 160
°C, and will be switched back on only when the
temperature goes below 140
°C.
NCP2809 is a stereo power audio amplifier.
If the application requires a Single Ended topology with
output coupling capacitors, then the current provided by
the battery for one output is as following:
VO(t) is the AC voltage seen by the load. Here we
consider a sine wave signal with a period T and a peak
voltage VO.
RL is the load.
T
TIME
T/2
VO/RL
Ip(t)
So, the total power delivered by the battery to the device is:
PTOT + Vp
Ipavg
Ipavg + 1
2p
p
0
Vo
RL
sin(t)dt +
Vo
p.RL
PTOT +
Vp.Vo
p.RL
The power in the load is POUT.
POUT +
VO2
2RL
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