參數(shù)資料
型號: NCP1351BDR2G
廠商: ON SEMICONDUCTOR
元件分類: 穩(wěn)壓器
英文描述: Variable Off Time PWM Controller
中文描述: 0.4 A SWITCHING CONTROLLER, PDSO8
封裝: LEAD FREE, SOIC-8
文件頁數(shù): 10/19頁
文件大?。?/td> 222K
代理商: NCP1351BDR2G
NCP1351
http://onsemi.com
10
Figure 9. In Light Load Conditions, the
Oscillator Further Delays the Restart Time
Figure 10. C
t
Voltage Swing at a Moderate
Loading
C
t
Voltage
C
t
Voltage
In light load conditions, the frequency can go down to a
few hundred Hz without any problem. The internal circuitry
naturally blocks the oscillator and softly shifts the restart
time as shown on Figure 9 scope shot.
Delays The Restart Time
In lack of feedback current, for instance during a startup
sequence or a short circuit, the oscillator frequency is pushed
to the limit set by the timing capacitor. In this case, the lower
threshold imposed to the timing capacitor is blocked to
500 mV (parameter V
fault
). This is the maximum power the
converter can deliver. To the opposite, as you inject current
via the optocoupler in the feedback pin, the off time expands
and the power delivery reduces. The maximum threshold
level in standby conditions is set to 6 V.
Over Power Protection
As any universalmains operated converters, the output
power slightly increases at high line compared to what the
power supply can deliver at low line. This discrepancy
relates to the propagation delay from the point where the
peak is detected to the MOSFET gate effective pulldown. It
naturally includes the controller reaction time, but also the
driver capability to pull the gate down. If the MOSFET Q
g
is too large, then this parameter will greatly affect your
overpower parameter. Sometimes, the small PNP can help
and we recommend it if you use a large Q
g
MOSFET:
Figure 11. A LowCost PNP Improves the Drive
Capability at Turnoff
D1
1N4148
Q1
2N2907
DRV
GND
Over power protection can be done without power
dissipation penalty by arranging components around the
auxiliary as suggested by Figure 11. On this schematic, the
diode anode swings negative during the on time. This
negative level directly depends on the input voltage and
offsets the current sense pin via the R
OPP
resistor. A small
integration is necessary to reduce the O
PP
action in light load
conditions. However, depending on the compensation level,
the standby power can be affected. Again, the resistor R
OPP
should be placed as close as possible to the CS pin. The
22 pF can help to circumvent any pickedup noise and D
2
prevents the positive loading of the 270 pF capacitor during
the flyback swing. We have put a typical 100 k O
PP
resistor but a tweak is required depending on your
application.
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