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參數(shù)資料
| 型號： | NC7SP38P5X |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 1/11頁 |
| 文件大小： | 0K |
| 描述： | IC GATE NAND ULP 2INP OD SC70-5 |
| 產(chǎn)品變化通告： | Mold Compound Change 12/Dec/2007 |
| 標準包裝： | 3,000 |
| 系列： | 7SP |
| 邏輯類型： | 與非門 |
| 電路數(shù)： | 1 |
| 輸入數(shù)： | 2 |
| 特點： | 開路漏極 |
| 電源電壓： | 0.9 V ~ 3.6 V |
| 電流 - 靜態(tài)（最大值）： | 0.9µA |
| 輸出電流高，低： | -，2.6mA |
| 邏輯電平 - 低： | 0.7 V ~ 0.9 V |
| 邏輯電平 - 高： | 1.6 V ~ 2.1 V |
| 額定電壓和最大 CL 時的最大傳播延遲： | 10ns @ 3V ~ 3.6V，30pF |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 供應(yīng)商設(shè)備封裝： | SC-70-5 |
| 封裝/外殼： | 6-TSSOP（5 引線），SC-88A，SOT-353 |
| 包裝： | 帶卷 (TR) |
NC7SP38
—
Tin
yLogic
ULP
2-Input
NAND
Gate
(Open
Drain
Output)
2004 Fairchild Semiconductor Corporation
www.fairchildsemi.com
NC7SP38 Rev. 1.0.0
September 2008
NC7SP38
TinyLogic ULP 2-Input NAND Gate (Open Drain Output)
Features
■ 0.9V to 3.6V VCC supply operation
■ 3.6V overvoltage tolerant I/O’s at VCC from 0.9V to
3.6V
■ tPD:
– 3.0ns typ. for 3.0V to 3.6V VCC
– 4.0ns typ. for 2.3V to 2.7V VCC
– 5.0ns typ. for 1.65V to 1.95V VCC
– 6.0ns typ. for 1.40V to 1.60V VCC
– 9.0ns typ. for 1.10V to 1.30V VCC
– 24.0ns typ. for 0.90V VCC
■ Power-off high impedance inputs and outputs
■ Static drive (IOH/IOL):
– ±2.6mA @ 3.00V VCC
– ±2.1mA @ 2.30V VCC
– ±1.5mA @ 1.65V VCC
– ±1.0mA @ 1.40V VCC
– ±0.5mA @ 1.10V VCC
– ±20A @ 0.9V VCC
■ Uses patented Quiet Series noise/EMI reduction
circuitry
■ Ultra small MicroPak package
■ Ultra low dynamic power
General Description
The NC7SP38 is a single 2-Input NAND Gate with
open drain output stage from Fairchild’s Ultra Low
Power (ULP) Series of TinyLogic. Ideal for applications
where battery life is critical, this product is designed for
ultra low power consumption within the VCC operating
range of 0.9V to 3.6V VCC.
The internal circuit is composed of a minimum of inverter
stages including the output buffer, to enable ultra low
static and dynamic power.
The NC7SP38, for lower drive requirements, is uniquely
designed for optimized power and speed, and is fabri-
cated with an advanced CMOS technology to achieve
best
in
class
speed
operation
while
maintaining
extremely low CMOS power dissipation.
Ordering Information
All packages are lead free per JEDEC: J-STD-020B standard.
Battery Life vs. VCC Supply Voltage
Order
Number
Package
Number
Package Code
Top Mark
Package Description
Supplied As
NC7SP38P5X
MAA05A
P38
5-Lead SC70, EIAJ SC-88a,
1.25mm Wide
3k Units on Tape and Reel
NC7SP38L6X
MAC06A
K7
6-Lead MicroPak, 1.0mm Wide
5k Units on Tape and Reel
700
600
500
400
300
200
100
0
0.9
1.2
ULP-A (SV)
ULP (SP)
UHS (SZ)
1.5
1.8
2.5
3.3
5.0
Battery Life
(Days)
VCC Supply Voltage
TinyLogic ULP and ULP-A with up to 50% less power consumption can
extend your battery life significantly.
Battery Life
= (V
battery x Ibattery x 0.9) / (Pdevice) / 24hrs/day
Where, Pdevice = (ICC x VCC) + (CPD + CL) x VCC
2 x f
Assumes ideal 3.6V Lithium Ion battery with current rating of 900mAH
and derated 90% and device frequency at 10MHz, with CL = 15pF load.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NC7SP38P5X_Q | 功能描述:邏輯門 2-Input NAND Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| NC7SP5 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:TinyLogic. ULP Universal Configurable 2-Input Logic Gates |
| NC7SP57 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:TinyLogic ULP Universal Configurable 2-Input Logic Gates |
| NC7SP57_04 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:TinyLogic ULP Universal Configurable 2-Input Logic Gates |
| NC7SP57L6X | 功能描述:邏輯門 2-Input Logic Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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