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參數(shù)資料
| 型號： | NBSG53A |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | 2.5V/3.3VSiGe Selectable Differential Clock and Data D Flip Flop/Clock Divider with Reset and OLS*(帶復位和OLS的2.5V/3.3VSiGe可選差分時鐘和數(shù)據(jù)D觸發(fā)器/時鐘分頻器) |
| 中文描述： | 2.5V/3.3V的硅鍺可選差分時鐘和數(shù)據(jù)d拖鞋/時鐘分頻器的復位和生命線行動*（帶復位和生命線的2.5V/3.3V的硅鍺可選差分時鐘和數(shù)據(jù)?觸發(fā)器/時鐘分頻器） |
| 文件頁數(shù)： | 1/18頁 |
| 文件大小： | 151K |
| 代理商： | NBSG53A |
Semiconductor Components Industries, LLC, 2005
December, 2005 Rev. 6
1
Publication Order Number:
NBSG53A/D
NBSG53A
2.5V/3.3VSiGe Selectable
Differential Clock and Data
D FlipFlop/Clock Divider
with Reset and OLS*
The NBSG53A is a multifunction differential D flipflop (DFF) or
fixed divide by two (DIV/2) clock generator. This is a part of the
GigaComm
family of high performance Silicon Germanium
products. A strappable control pin is provided to select between the
two functions. The device is housed in a low profile 4x4 mm 16pin
FlipChip BGA (FCBGA) or a 3x3 mm 16 pin QFN package.
The NBSG53A is a device with data, clock, OLS*, reset, and select
inputs. Differential inputs incorporate internal 50
resistors and accept NECL (Negative ECL), PECL (Positive ECL),
LVCMOS/LVTTL, CML, or LVDS. The OLS* input is used to
program the peaktopeak output amplitude between 0 and 800 mV
in five discrete steps. The RESET and SELECT inputs are
singleended and can be driven with either LVECL or
LVCMOS/LVTTL input levels.
Data is transferred to the outputs on the positive edge of the clock.
The differential clock inputs of the NBSG53A allow the device to also
be used as a negative edge triggered device.
Maximum Input Clock Frequency (DFF) > 8 GHz Typical
(See Figures 4, 6, 8, 10, and 11)
Maximum Input Clock Frequency (DIV/2) > 10 GHz Typical
(See Figures 5, 7, 9, 10, and 11)
210 ps Typical Propagation Delay (OLS = FLOAT)
45 ps Typical Rise and Fall Times (OLS = FLOAT)
DIV/2 Mode (Active with Select Low)
DFF Mode (Active with Select High)
Selectable Swing PECL Output with Operating Range: V
CC
= 2.375 V
to 3.465 V with V
EE
= 0 V
Selectable Swing NECL Output with NECL Inputs with
Operating Range: V
CC
= 0 V with V
EE
= 2.375 V to 3.465 V
Selectable Output Level (0 V, 200 mV, 400 mV, 600 mV, or 800 mV
PeaktoPeak Output)
50 Internal Input Termination Resistors on all Differential Inputs
PbFree Packages are Available
termination
*Output Level Select
FCBGA16
BA SUFFIX
CASE 489
MARKING
DIAGRAM**
SG
53A
LYW
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 16 of this data sheet.
ORDERING INFORMATION
A
L
Y
W
= Assembly Location
= Wafer Lot
= Year
= Work Week
= PbFree Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
QFN16
MN SUFFIX
CASE 485G
SG
53A
ALYW
1
1
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| NBSG53A/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS |
| NBSG53A_06 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip−Flop/Clock Divider with Reset and OLS |
| NBSG53ABA | 功能描述:觸發(fā)器 2.5V/3.3V SiGe Diff RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| NBSG53ABAEVB | 功能描述:時鐘和定時器開發(fā)工具 BBG NBSG53ABA EVAL BOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| NBSG53ABAHTBG | 功能描述:時鐘驅動器及分配 2.5/3.3V SEL DIFF CLK RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
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