參數(shù)資料
型號(hào)： NBSG86ABAEVB
廠(chǎng)商： ON SEMICONDUCTOR
英文描述： Evaluation Board Manual
中文描述： 評(píng)估板手冊(cè)
文件頁(yè)數(shù)： 1/20頁(yè)
文件大小： 109K
代理商： NBSG86ABAEVB
Semiconductor Components Industries, LLC, 2003
March, 2003 - Rev. 0
1
Publication Order Number:
NBSG86ABAEVB/D
NBSG86ABAEVB
Evaluation Board Manual
for NBSG86A
DESCRIPTION
This document describes the NBSG86A evaluation board
and the appropriate lab test setups. It should be used in
conjunction with the device data sheet, which includes
specifications and a full description of device operation.
The board is used to evaluate the NBSG86A
GigaComm
differential Smart Gate multi-function logic
gate, which can be configured as an AND/NAND,
OR/NOR, XOR/XNOR, or 2:1 MUX. The OLS input of the
NBSG86A is used to program the peak–to–peak output
amplitude between 0 and 800 mV in five discrete steps.
The board is implemented in two layers and provides a
high bandwidth 50 controlled impedance environment for
higher performance. The first layer or primary trace layer is
5 mils thick Rogers RO6002 material, which is engineered
to have equal electrical length on all signal traces from the
NBSG86A device to the sense output. The second layer is
32 mils thick copper ground plane.
For standard lab setup and test, a split (dual) power supply
is required enabling the 50 impedance from the scope to
be used as termination of the ECL signals, where V
TT
is the
system ground (V
CC
= 2.0 V, V
TT
= V
CC
- 2.0 V and V
EE
is -0.5 V or -1.3 V, see Setup 1).
What measurements can you expect to make
The following measurements can be performed in the
single–ended (Note 1) or differential mode of operation:
Frequency Performance
Output Amplitude (V
OH
/V
OL
)
Output Rise and Fall Time
Output Skew
Eye pattern generation
Jitter
V
IHCMR
(Input High Common Mode Range)
NOTE:
1. Single- ended measurements can only be made at
V
CC
- V
EE
= 3.3 V using this board setup.
Figure 1. NBSG86A Evaluation Board
EVALUATION BOARD MANUAL
http://onsemi.com
相關(guān)PDF資料
PDF描述
NBSG86AMN 2.5V/3.3VSiGe Differential Smart Gate with Output Level Select
NBSG86ABA 2.5V/3.3VSiGe Differential Smart Gate with Output Level Select
NBSG86ABAR2 2.5V/3.3VSiGe Differential Smart Gate with Output Level Select
NBSG86AMNR2 2.5V/3.3VSiGe Differential Smart Gate with Output Level Select
NBSG86AMNG 2.5V/3.3V SiGe Differential Smart Gate with Output Level Select
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
NBSG86ABAHTBG 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 BBG SIGE DIF SMARTGATE OL RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類(lèi)型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
NBSG86ABAR2 功能描述:邏輯門(mén) 2.5V/3.3V SiGe Diff RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線(xiàn)路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel
NBSG86AMAG 功能描述:IC SMART GATE SIGE DIFF 16-FCLGA RoHS:是 類(lèi)別:集成電路 (IC) >> 邏輯 - 柵極和逆變器 - 多功能，可配置 系列:- 產(chǎn)品變化通告:Product Obsolescence 05/Oct/2010 標(biāo)準(zhǔn)包裝:100 系列:- 邏輯類(lèi)型:可配置多功能 電路數(shù):2 輸入數(shù):2 施密特觸發(fā)器輸入:無(wú) 輸出類(lèi)型:差分 輸出電流高，低:- 電源電壓:2.375 V ~ 3.465 V 工作溫度:-40°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:16-LBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:16-FCBGA（4x4） 包裝:帶卷 (TR)
NBSG86AMN 功能描述:邏輯門(mén) 2.5V/3.3V SiGe Diff RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線(xiàn)路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel
NBSG86AMNG 功能描述:邏輯門(mén) 2.5V/3.3V SiGe Diff Smart Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線(xiàn)路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠(chǎng)商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*