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參數(shù)資料
| 型號： | NBSG11MNG |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK BUFFER 1:2 12GHZ 16-QFN |
| 標準包裝： | 123 |
| 類型： | 扇出緩沖器（分配） |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:2 |
| 差分 - 輸入:輸出： | 是/是 |
| 輸入： | CML，LVCMOS，LVDS，LVTTL，NECL，RSNECL，PECL |
| 輸出： | RSECL，RSNECL，RSPECL |
| 頻率 - 最大： | 12GHz |
| 電源電壓： | 2.375 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 16-QFN（3x3） |
| 包裝： | 管件 |
| 其它名稱： | NBSG11MNGOS |
NBSG11
http://onsemi.com
2
Figure 1. BGA16 Pinout (Top View)
VTCLK
CLK
VEE
VTCLK
NC
VEE
NC
Q1
VCC
NC
Q0
Q1
A
B
C
D
12
3
4
VEE NC
NC VCC
VEE NC
NC
VCC
Q0
Q1
VTCLK
CLK
VTCLK
56
7
8
16
15
14
13
12
11
10
9
1
2
3
4
NBSG11
Exposed Pad (EP)
Figure 2. QFN16 Pinout (Top View)
Table 1. PIN DESCRIPTION
Pin
Name
I/O
Description
BGA
QFN
D1
1
VTCLK
Internal 50 W Termination Pin. See Table 2.
C1
2
CLK
ECL, CML,
LVCMOS, LVDS,
LVTTL Input
Inverted Differential Input. Internal 75 kW to VEE and 36.5 kW to VCC.
B1
3
CLK
ECL, CML,
LVCMOS, LVDS,
LVTTL Input
Noninverted Differential Input. Internal 75 kW to VEE.
A1
4
VTCLK
Internal 50 W Termination Pin. See Table 2.
B2,C2
5,16
VEE
Negative Supply Voltage
A2,A3,D2,
D3
6,7,14,15
NC
No Connect
B3,C3
8,13
VCC
Positive Supply Voltage
A4
9
Q1
RSECL Output
Inverted Differential Output 1. Typically Terminated with 50 W to
VTT = VCC 2.0 V*.
B4
10
Q1
RSECL Output
Noninverted Differential Output 1. Typically Terminated with 50 W to
VTT = VCC 2.0 V*.
C4
11
Q0
RSECL Output
Inverted Differential output 0. Typically Terminated with 50 W to
VTT = VCC 2.0 V*.
D4
12
Q0
RSECL Output
Noninverted Differential Output 0. Typically Terminated with 50 W to
VTT = VCC 2.0 V*.
N/A
EP
The Exposed Pad (EP) and the QFN16 package bottom is thermally con-
nected to the die for improved heat transfer out of package. The exposed
pad must be attached to a heatsinking conduit. The pad is not electrically
connected to the die but may be electrically and thermally connected to VEE
on the PC board.
*Devices in BGA package typically terminated with 50 W to VTT = VCC 1.5 V.
1. The NC pins are electrically connected to the die and must be left open.
2. All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation. The thermally exposed pad on package
bottom (see case drawing) must be attached to a heatsinking conduit.
3. In the differential configuration when the input termination pins (VTCLK, VTCLK) are connected to a common termination voltage, and
if no signal is applied then the device will be susceptible to selfoscillation.
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