Table 4. DC CHARACTERISTICS, CLOCK Inputs, CML Outputs (VCC" />
參數(shù)資料
型號(hào): NB7L11MMNG
廠商: ON Semiconductor
文件頁數(shù): 6/11頁
文件大?。?/td> 0K
描述: IC CLK/DTA BUF TRNSLA 1:2 16-QFN
標(biāo)準(zhǔn)包裝: 123
類型: 扇出緩沖器(分配),變換器,數(shù)據(jù)
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 是/是
輸入: CML,LVCMOS,LVDS,LVPECL,LVTTL
輸出: CML
頻率 - 最大: 8GHz
電源電壓: 2.375 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 16-QFN(3x3)
包裝: 管件
其它名稱: NB7L11MMNG-ND
NB7L11MMNGOS
NB7L11M
http://onsemi.com
4
Table 4. DC CHARACTERISTICS, CLOCK Inputs, CML Outputs (VCC = 2.375 V to 3.465 V, VEE = 0 V, TA = 40°C to +85°C)
(Note 5)
Symbol
Characteristic
Min
Typ
Max
Unit
ICC
Power Supply Current (Input and Outputs open)
85
105
mA
VOH
Output HIGH Voltage (Note 6)
VCC 60
VCC 20
VCC
mV
VOL
Output LOW Voltage (Note 6)
VCC 530
VCC 420
VCC 360
mV
Differential Input Driven SingleEnded (see Figures 10 & 12) (Note 8)
Vth
Input Threshold Reference Voltage Range (Note 7)
1125
VCC 75
mV
VIH
Singleended Input HIGH Voltage (Note 8)
Vth + 75
VCC
mV
VIL
Singleended Input LOW Voltage (Note 8)
VEE
Vth 75
mV
Differential Inputs Driven Differentially (see Figures 11 & 13) (Note 8)
VIHCLK
Differential Input HIGH Voltage
1200
VCC
mV
VILCLK
Differential Input LOW Voltage
VEE
VCC 75
mV
VCMR
Input Common Mode Range (Differential Configuration)
1163
VCC – 38
mV
VID
Differential Input Voltage (VIHCLK VILCLK)
75
2500
mV
IIH
Input HIGH Current
CLK / CLK
(VTCLK/VTCLK Open)
0
25
100
mA
IIL
Input LOW Current
CLK / CLK
(VTCLK/VTCLK Open)
10
0
10
mA
RTIN
Internal Input Termination Resistor
45
50
55
W
RTOUT
Internal Output Termination Resistor
45
50
55
W
RTemp Coef Internal I/O Termination Resistor Temperature Coefficient
6.38
mW/°C
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Input and output parameters vary 1:1 with VCC.
6. CML outputs require 50 W receiver termination resistors to VCC for proper operation.
7. Vth is applied to the complementary input when operating in singleended mode.
8. VCMR min varies 1:1 with VEE, VCMR max varies 1:1 with VCC.
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