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參數(shù)資料
| 型號： | NB4L16MMNEVB |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 8/12頁 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR NB4L16MMN |
| 標準包裝： | 1 |
| 主要目的： | 計時，時鐘緩沖器 / 驅動器 / 接收器 / 變換器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | NB4L16M |
| 主要屬性： | 輸入最高達 5Gb/s 和 3.5GHz |
| 次要屬性： | 差分式 CML 輸出 |
| 已供物品： | 板 |
| 其它名稱： | NB4L16MMNEVBOS |
NB4L16M
http://onsemi.com
5
Symbol
Characteristic
40°C
25°C
85°C
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
VOUTPP Output Voltage Amplitude (@VINPPmin)fin ≤ 3.5 GHz
fin ≤ 4.5 GHz
280
150
400
300
280
150
400
300
280
150
400
300
mV
fDATA
Maximum Operating Data Rate
3.5
5.0
3.5
5.0
3.5
5.0
Gb/s
tPLH,
tPHL
Propagation Delay to Output Differential @ 0.5 GHz
(Figure 6)
175
215
265
175
220
265
175
225
265
ps
tSKEW
Duty Cycle Skew (Note 9)
DevicetoDevice Skew (Note 13)
2.0
6.0
10
90
2.0
6.0
10
90
2.0
6.0
10
90
ps
tJITTER
RMS Random Clock Jitter (Note 11)
fin ≤ 4.5 GHz
PeaktoPeak Data Dependent Jitter
(Note 12)
fDATA = 2.5 Gb/s
fDATA = 3.5 Gb/s
fDATA = 5.0 Gb/s
0.2
1.5
2.0
9.0
0.7
10
12
25
0.2
1.5
2.0
9.0
0.7
10
12
25
0.2
1.5
2.0
9.0
0.7
10
12
25
ps
VINPP
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 10)
75
VCC
VEE
75
VCC
VEE
75
VCC
VEE
mV
tr
tf
Output Rise/Fall Times @ 0.5 GHz
(Figure 5)
(20% 80%)
60
90
60
90
60
90
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
8. Measured by forcing VINPP(MIN) from a 50% duty cycle clock source. All loading with an external RL = 50 W to VCC. Input edge rates 40 ps
9. Duty cycle skew is measured between differential outputs using the deviations of the sum of Tpw and Tpw+ @ 0.5 GHz.
10.VINPP(MAX) cannot exceed VCC VEE. Input voltage swing is a singleended measurement operating in differential mode. See Figure 11.
11. Additive RMS jitter with 50% duty cycle input clock signal.
12.Additive peaktopeak data dependent jitter with NRZ input data signal, PRBS 2231 and K28.7 pattern. See Figures 7, 8, 9, 10, 11 and 12.
13.Devicetodevice skew is measured between outputs under identical transition @ 0.5 GHz.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| NB4L16MMNG | 功能描述:轉換 - 電壓電平 2.5V/3.3V 5Gb/s Driver/RCVR/Buffer RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
| NB4L16MMNR2 | 功能描述:轉換 - 電壓電平 2.5V/3.3V 5Gb/s RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
| NB4L16MMNR2G | 功能描述:轉換 - 電壓電平 2.5V/3.3V 5Gb/s Driver/RCVR/Buffer RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
| NB4L339 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:3.3V 1:4 Clock Fanout Buffer |
| NB4L339_07 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:2.5 V / 3.3 V Differential 2:1 Clock IN to Differential LVPECL Clock Generator / Divider / Fan−Out Buffer |
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