參數(shù)資料
型號: N74F640N,602
廠商: NXP Semiconductors
文件頁數(shù): 7/11頁
文件大?。?/td> 0K
描述: IC TRANSCEIVER 3ST 8BIT 20DIP
標準包裝: 720
系列: 74F
邏輯類型: 收發(fā)器,反相
元件數(shù): 1
每個元件的位元數(shù): 8
輸出電流高,低: 3mA,24mA; 15mA,64mA
電源電壓: 4.5 V ~ 5.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 通孔
封裝/外殼: 20-DIP(0.300",7.62mm)
供應商設備封裝: 20-DIP
包裝: 管件
其它名稱: 933784340602
N74F640N
N74F640N-ND
Philips Semiconductors
Product specification
74F640
Octal bus transceiver, inverting (3-State)
1989 Nov 27
5
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
NO TAG
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONSNO TAG
MIN
TYP
NO TAG
MAX
UNIT
A0–A7
IO = 3mA
±10%VCC
2.4
V
VO
High level output voltage
B0–B7
VCC = MIN,
VIL = MAX
IOH = –3mA
±5%VCC
2.7
3.3
V
VOH
High-level output voltage
B0 B7
VIL = MAX,
VIH = MIN
IO = 15mA
±10%VCC
2.0
V
B0–B7
IOH = –15mA
±5%VCC
2.0
V
A0 A7
IO = 24mA
±10%VCC
0.35
0.50
V
VO
Low level output voltage
A0–A7
VCC = MIN,
VIL = MAX
IOL = 24mA
±5%VCC
0.35
0.50
V
VOL
Low-level output voltage
B0 B7
VIL = MAX,
VIH = MIN,
IO = MAX
±10%VCC
0.55
V
B0–B7
IOL = MAX
±5%VCC
0.42
0.55
V
VIK
Input clamp voltage
VCC = MIN, II = IIK
–0.73
–1.2
V
II
Input current at maximum
OE,
T/R
VCC = 0.0V, VI = 7.0V
100
A
II
input voltage
A0–A7,
B0–B7
VCC = 5.5V, VI = 5.5V
1.0
mA
IIH
High-level input current
OE,
T/R
VCC = MAX, VI = 2.7V
40
A
IIL
Low-level input current
T/R
only
VCC = MAX, VI = 0.5V
–40
A
IOZH+IIH
Off-state output current,
High level of voltage applied
VCC = MAX, VI = 2.7V
70
A
IOZL+IIL
Off-state output current,
Low level of voltage applied
VCC = MAX, VI = 0.5V
–70
A
IOS
Short-circuit output cur-
NO TAG
A0–A7
VCC = MAX
–60
–150
mA
IOS
rentNO TAG
B0–B7
VCC = MAX
–100
–225
A
ICCH
T/R = An = 4.5V,
OE = GND
66
85
mA
ICC
Supply current (total)
ICCL
VCC = MAX
T/R = Bn = OE = GND
91
120
mA
ICCZ
T/R = Bn = GND,
OE = 4.5V
78
102
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5V, Tamb = 25°C.
3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS tests should be performed last.
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