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參數(shù)資料
| 型號(hào)： | N74F109D-T |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 鎖存器 |
| 英文描述： | Positive J-Knot positive edge-triggered flip-flops - Description: Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; F<sub>max</sub>: 125 MHz; Logic switching levels: TTL ; Number of pins: 14 ; Output drive capability: -1/+20 mA ; Propagation delay: 6.2 ns; Voltage: 4.5-5.5 V |
| 中文描述： | F/FAST SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 |
| 封裝： | 3.9 MM, PLASTIC, SOT109-1, SO-16 |
| 文件頁數(shù)： | 3/10頁 |
| 文件大?。?/td> | 95K |
| 代理商： | N74F109D-T |
Philips Semiconductors
Product specification
74F109
Postive J-K positive edge-triggered flip-flops
2
October 23, 1990
853–0337 00783
FEATURE
Industrial temperature range available (–40°C to +85°C)
DESCRIPTION
The 74F109 is a dual positive edge-triggered JK-type flip-flop
featuring individual J, K, clock, set, and reset inputs; also true and
complementary outputs. Set (SD) and reset (RD) are asynchronous
active low inputs and operate independently of the clock (CP) input.
The J and K are edge-triggered inputs which control the state
changes of the flip-flops as described in the function table. Clock
triggering occurs at a voltage level and is not directly related to the
transition time of the positive-going pulse. The J and K inputs must
be stable just one setup time prior to the low-to-high transition of the
clock for predictable operation. The JK design allows operation as a
D flip-flop by tying J and K inputs together. Although the clock input
is level sensitive, the positive transition of the clock pulse between
the 0.8V and 2.0V levels should be equal to or less than the clock to
output delay time for reliable operation.
PIN CONFIGURATION
16
15
14
13
12
11
10
7
6
5
4
3
2
1
Q0
VCC
CP1
SD1
Q1
K1
RD1
J1
RD0
J0
Q0
K0
CP0
SD0
9
8
GND
Q1
SF00135
TYPE
TYPICAL fmax
TYPICAL SUPPLY CURRENT
(TOTAL)
74F109
125MHz
12.3mA
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
COMMERCIAL RANGE
VCC = 5V ±10%, Tamb = 0°C to +70°C
INDUSTRIAL RANGE
VCC = 5V ±10%, Tamb = –40°C to +85°C
PKG DWG #
16-pin plastic DIP
N74F109N
I74F109N
SOT38-4
16-pin plastic SO
N74F109D
I74F109D
SOT109-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
DESCRIPTION
74F (U.L.) HIGH/LOW
LOAD VALUE HIGH/LOW
J0, J1
J inputs
1.0/1.0
20
A/0.6mA
K0, K1
K inputs
1.0/1.0
20
A/0.6mA
CP0, CP1
Clock inputs (active rising edge)
1.0/1.0
20
A/0.6mA
SD0, SD1
Set inputs (active Low)
1.0/3.0
20
A/1.8mA
RD0, RD1
Reset inputs (active Low)
1.0/3.0
20
A/1.8mA
Q0, Q1, Q0, Q1
Data outputs
50/33
1.0mA/20mA
NOTE: One (1.0) FAST unit load is defined as: 20
A in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
J1
J0
Q0 Q0 Q1 Q1
VCC = Pin 16
GND = Pin 8
K1
K0
2 14
3 13
6
7
10
9
CP0
SD0
RD0
CP1
SD1
RD1
4
5
1
12
11
15
SF00136
IEC/IEEE SYMBOL
SF00137
7
2
4
3
1
5
14
12
13
15
11
6
10
9
1J
C1
1K
R
S
2J
C2
2K
R
S
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| N74F109N | 功能描述:觸發(fā)器 DUAL J-K POS EDGE RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| N74F109N,602 | 功能描述:觸發(fā)器 DUAL J-K POS EDGE RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| N74F10D | 功能描述:邏輯門 TRIPLE 3-INPUT NAND GATE RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| N74F10D,602 | 功能描述:邏輯門 TRIPLE 3-INPUT NAND RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| N74F10D,623 | 功能描述:邏輯門 TRIPLE 3-INPUT NAND RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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