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參數(shù)資料
| 型號： | MXA-256-1 |
| 英文描述： | Optoelectronic |
| 中文描述： | 光電 |
| 文件頁數(shù)： | 7/11頁 |
| 文件大小： | 1530K |
| 代理商： | MXA-256-1 |
www.perkinelmer.com/opto
MXA-256-1, 2
01-001:121201/7
Timing Diagrams
Readout:
There are only two control signals required to operate the
array, clock (Even and Odd) and Int/Reset. The clock is
applied continuously to operate the array. During the high
state of Int/Reset, the signal is integrated. The signals are
read out during the low state of Int/Reset. The first sample
(Video 1) is taken at the beginning of an integration.
During Reset at the low state of Int/Reset and immediately
prior to integration, the pixels are held at reset so that
Video 1 captures the “zero” level.
The second sample (actual signal) is taken at the end of
the integration and is available at pin Video 2.
The Video 1 and Video 2 are differentially amplified for
correlated double sampling (CDS).
CDS removes integrator offsets and further suppresses
low frequency noise.
The first pixel of Odd Video appears at the third rising
edge of the clock after the falling edge of Int/Reset. The
first pixel of Even Video will appear at the fourth falling
edge of the clock after the falling edge of Int/Reset.
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