- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄380581 > MX98727 (MACRONIX INTERNATIONAL CO LTD) Single Chip PCI/CARD Bus Fast Ethernet Controller(單片PCI/卡總線快速以太網(wǎng)控制器) PDF資料下載
參數(shù)資料
| 型號： | MX98727 |
| 廠商： | MACRONIX INTERNATIONAL CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Single Chip PCI/CARD Bus Fast Ethernet Controller(單片PCI/卡總線快速以太網(wǎng)控制器) |
| 中文描述： | 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP128 |
| 封裝： | LQFP-128 |
| 文件頁數(shù)： | 1/47頁 |
| 文件大小： | 231K |
| 代理商： | MX98727 |
當(dāng)前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁
1
P/N:PM0516
REV. 0.2, JUL. 28, 1999
MX98727
SINGLE CHIP PCI/CARDBUS FAST
ETHERNET CONTROLLER
1.0 Feature
A single chip solution with 3.3V CardBus/PCI interface
integrates 10/100 Base-T fast Ethernet MAC, NWAY
and 10/100 Base-T transceiver
Compliant to CardBus specification of PC Card Stan-
dard 6.1
Compliant to PCI specification Revision 2.1 and PCI
Bus Power Management Interface specification Revi-
sion 1.0
Fully comply to IEEE 802.3 and ANSI 8802-3 Ethernet
standards
Operates over 100 meters of STP and category 5 UTP
cable
Support full duplex operation in both 100 Base-TX and
10 Base-TX modes
Support 802.3x "Frame Based Flow Control" scheme in
full duplex mode
Support network and communication device class
OnNow requirements for Microsoft's PC98 specifica-
tions, including all wake-up events:
1. Magic Packet
TM
2. Wake-up Frames
3. Link Change
4. Modem Phone Ring
Support 10 Mb/s and 100 Mb/s NWAY auto negotiation
function
Large on chip FIFOs for both transmit and receive
operations without external local memory
Bus master architecture with linked host buffers deliv-
ers world class performance
32-bit bus master DMA channel provides ultra low CPU
utilization
Support up to 32K bytes boot ROM interface
Three levels of loopback diagnostical capability
Support a variety of flexible address filtering modes
with 16 CAM addresses and 512 bits hash
Support CardBus Card Information Structure (CIS)
body stored in a 4k-bit Serial EEPROM or Flash ROM.
MicroWire interface to Serial EEPROM containing Sub-
system ID, Card Information Structure (CIS) pointer,
Ethernet address and so on
Support PCI/CardBus unlimit burst, read line, read
multiple, write and invalidate commands
Support Dual Function Cardbus for 10/100 Mb/s
Ethernet and Modem
Provides an interface to a wide range of modem
chipsets available in the market
Support LED output for various network activity indica-
tions
Support early interrupt on transmit and receive
Support CardBus clock control through CLKRUNB pin
Support CardBus CSTSCHG pin and Status Changed
registers
5V operating power for PHY and PMD, 3.3V for PCI/
CardBus bus interface and MAC
128-pin LQFP package with standard CMOS technol-
ogy
( Magic Packet
TM
Technology is a trademark of Advanced
Micro Device Corp. )
2.0 Genernal Description
The MX98727, single chip 10/100M fast Ethernet con-
troller, is designed to interface directly with 3.3V PCI/
CardBus bus and 10/100 Base-T Fast Ethernet network
without external transceiver.
High speed PCI/CardBus master interface is imple-
mented to support 100Mb/s fast Ethernet with fast packet
buffer management. On chip control registers and PCI/
CardBus configuration registers provide interface to host
system for automatic bus master configuration and driver
controls. As a PCI/CardBus bus master, MX98727 in-
corporates large on chip FIFOs which provides effective
local packet buffers, therefore no external local buffer
memory is needed.
The MX98727 implements all Media Access Control
(MAC) layer functions for transmission, reception, NWAY
auto-negociation and 10/100M transceivers in accordance
with the IEEE 802.3/802.3u standard.
Full duplex and half duplex are both supported for differ-
ent applications. A packet buffer is located in the host
memory that is used by software driver for all incoming
and outgoing packets. This buffer area is shared by both
transmit process and receive process. During reception,
the MX98727 stores packets in the receive buffer area,
then indicates receive status and control information in
the descriptor area.
ADVANCED INFORMATION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MX98741 | XRC 100Base-TX/FX Repeater Controller(XRC 100Base-TX/FX 中繼器控制器) |
| MX98742 | Low-Cost 100Mbps Fast Ethernet Bridge Controller(低成本100Mbps快速以太網(wǎng)橋控制器) |
| MX98743 | 100 Base Fast Ethernet Management Chip(100 Base快速以太網(wǎng)管理芯片) |
| MX98745 | 100 BASE-TX/FX Repeater Controller(100 BASE-TX/FX 中繼器控制器) |
| MX98746 | 100 Base-TX/FX 5-Port ClassII Repeater Controller(100 Base-TX/FX 5端口 ClassII中繼器控制器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MX98728 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:GMAC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION |
| MX98728AEC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Controller Miscellaneous - Datasheet Reference |
| MX98728EC | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:GMAC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION |
| MX98741 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| MX98742 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FEBC 100 Base Fast Ethernet Bridge Controller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。