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參數(shù)資料
| 型號(hào)： | MX98723UC |
| 廠商： | MACRONIX INTERNATIONAL CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 3.3V PCI/CARDBUS Interface 10/100M Fast Ethernet Controller(3.3V PCI/CARDBUS接口的10/100M 快速以太網(wǎng)控制器) |
| 中文描述： | 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP144 |
| 封裝： | LQFP-144 |
| 文件頁數(shù)： | 1/47頁 |
| 文件大?。?/td> | 247K |
| 代理商： | MX98723UC |
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1
P/N:PM0487
REV. 0.7, JUN. 22, 2000
MX98723UC
PCI/CARDBUS FAST ETHERNET CONTROLLER
ADVANCED INFORMATION
1.0 Feature
A 32-bit CardBus/PCI fast Ethernet Controller inte-
grates 10/100 Base-T MAC, NWAY, MII Interface and
10 Base-T transceiver
Compliant to CardBus specification of the PC Card
Standard 6.1
Compliant to PCI specification Revision 2.2 and PCI
Bus Power Management Interface specification Revi-
sion 1.0
Fully comply to IEEE 802.3 and ANSI 8802_3 Ethernet
standards.
Support full duplex operation on both MII/SYM and 10
Base-T ports
Support 802.3x "Frame Based Flow Control" scheme
in full duplex mode
Support network and communication device class
OnNow requirements for Microsoft's PC98 specifica-
tions, including all wake-up events:
1. Magic Packet
TM
2. Wake-up Frames
3. Link Change
Support 10 Mb/s and 100 Mb/s NWAY auto negotia-
tion function
Large on chip FIFOs for both transmit and receive
operations without external local memory
Bus master architecture with linked host buffers deliv-
ers world class performance
32-bit bus master DMA channel provides ultra low CPU
utilization
Support up to 256KB boot ROM and FLASH interface
Also, support a single latch on the boot ROM port
Three levels of loopback diagnostic capability
Support a variety of flexible address filtering modes
with 16 CAM addresses and 512 bits hash
Support CardBus Card Information Structure (CIS)
body stored in a 4k-bit Serial EEPROM or Flash ROM
MicroWire interface to Serial EEPROM containing
Subsystem ID, Card Information Structure (CIS)
pointer, Ethernet address and so on
Support PCI/CardBus unlimit burst, read line, read
multiple, write and invalidate commands
Support LED output for various network activity indica-
tions
Support early interrupt on transmit and receive
Support CardBus clock control through CLKRUNB pin
Support CardBus CSTSCHG pin and Status Changed
registers
3.3V operating power
144-pin LQFP package with standard CMOS technol-
ogy
( Magic Packet
TM
Technology is a trademark of Ad-
vanced Micro Device Corp. )
2.0 Genernal Description
The MX98723UC, 10/100M media access controller, with
3.3V PCI/CardBus interface is an optimized design to
ease interface with CSMA/CD type local area networks
including 100Mb/s-TX/FX Fast Ethernet, 10Mb/s Thick
Ethernet, 10Mb/s Thin Ehternet (Cheapernet), StarLAN
with external network transceivers and 10Mbps Twisted-
pair Ethernet without external transceiver. High speed
PCI/CardBus master interface is implemented to sup-
port 100Mb/s fast Ethernet with fast packet buffer man-
agement. On chip control registers and PCI/CardBus
configuration registers provide interface to host system
for automatic bus master configuration and driver con-
trols. As a PCI/CardBus bus master, MX98723UC incor-
porates large on chip FIFOs which provides effective
local packet buffers, therefore no external local buffer
memory is needed.
The MX98723UC implements all Media Access Control
(MAC) layer functions for transmission, reception and
NWAY auto-negociation in accordance with the IEEE
802.3/802.3u standard. MX98723UC can be programmed
to support various level of interconnects. Supported in-
terconnects are standard Media Independent Interface
( MII ) ,100Base-TX Physical Coding Sublayer ( PCS
),and a direct 10Base Twisted pair media interface.
Full duplex and half duplex are both supported for differ-
ent applications. A packet buffer is located in the host
memory that is used by software driver for all incoming
and outgoing packets. This buffer area is shared by both
transmit process and receive process. During reception,
the MX98723UC stores packets in the receive buffer area,
then indicates receive status and control information in
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MX98723 | 3.3V PCI/CARDBUS Interface 10/100M Fast Ethernet Controller(3.3V PCI/CARDBUS接口的10/100M 快速以太網(wǎng)控制器) |
| MX98725 | Single Chip 10/100Mbps Base-T Fast Ethernet NIC Controller,Additionally Supports ACPI, Remote-Wake-Up, Remote-Power-On,Up to 256K Bytes Flash Interface(單片10/100Mbps Base-T快速以太網(wǎng)NIC控制器（支持ACPI,遠(yuǎn)程喚醒,遠(yuǎn)程上電,高達(dá)256K字節(jié)閃速接口）) |
| MX98726 | Single Chip 10/100Mbps Fast Ethernet Controller With uP Interface(單片10/100Mbps 快速以太網(wǎng)控制器（帶微處理器接口）) |
| MX98727 | Single Chip PCI/CARD Bus Fast Ethernet Controller(單片PCI/卡總線快速以太網(wǎng)控制器) |
| MX98741 | XRC 100Base-TX/FX Repeater Controller(XRC 100Base-TX/FX 中繼器控制器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MX98725 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE CHIP FAST ETHERNET NIC CONTROLLER |
| MX98726 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER WITH uP INTERFACE |
| MX98726AEC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Controller Miscellaneous - Datasheet Reference |
| MX98726EC | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER WITH uP INTERFACE |
| MX98727 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE CHIP PCI/CARDBUS FAST ETHERNET CONTROLLER |
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