參數(shù)資料
型號： MX29LV320ABTC-70
廠商： MACRONIX INTERNATIONAL CO LTD
元件分類： DRAM
英文描述： 32M-BIT [4M x 8 / 2M x 16] SINGLE VOLTAGE 3V ONLY FLASH MEMORY
中文描述： 2M X 16 FLASH 3V PROM, 70 ns, PDSO48
封裝： 12 X 20 MM, PLASTIC, MO-142, TSOP1-48
文件頁數(shù)： 17/60頁
文件大小： 619K
代理商： MX29LV320ABTC-70
17
P/N:PM1008
REV. 1.1, MAY 28, 2004
MX29LV320AT/B
READING ARRAY DATA
The device is automatically set to reading array data
after device power-up. No commands are required to
retrieve data. The device is also ready to read array data
after completing an Automatic Program or Automatic
Erase algorithm.
After the device accepts an Erase Suspend command,
the device enters the Erase Suspend mode. The sys-
tem can read array data using the standard read tim-
ings, except that if it reads at an address within erase-
suspended sectors, the device outputs status data. After
completing a programming operation in the Erase
Suspend mode, the system may once again read array
data with the same exception. See Erase Suspend/Erase
Resume Commands
”
for more information on this mode.
The system
must
issue the reset command to re-en-
able the device for reading array data if Q5 goes high
during an active program or erase operation, or while in
the Automatic Select mode. See the "Reset Command"
section, next.
RESET COMMAND
Writing the reset command to the device resets the
device to reading array data. Address bits are don't care
for this command.
The reset command may be written between the se-
quence cycles in an erase command sequence before
erasing begins. This resets the device to reading array
data. Once erasure begins, however, the device ignores
reset commands until the operation is complete.
The reset command may be written between the se-
quence cycles in a program command sequence before
programming begins. This resets the device to reading
array data (also applies to programming in Erase Suspend
mode). Once programming begins, however, the device
ignores reset commands until the operation is complete.
The reset command may be written between the se-
quence cycles in an Automatic Select command
sequence. Once in the Automatic Select mode, the reset
command
must
be written to return to reading array data
(also applies to Automatic Select during Erase Suspend).
If Q5 goes high during a program or erase operation,
writing the reset command returns the device to read-ing
array data (also applies during Erase Suspend).
AUTOMATIC SELECT COMMAND SEQUENCE
The Automatic Select command sequence allows the
host system to access the manufacturer and device
codes, and determine whether or not a sector is pro-
tected. Table 2 shows the address and data requirements.
This method is an alternative to that shown in Table 3,
which is intended for EPROM programmers and requires
V
ID
on address bit A9.
The Automatic Select command sequence is initiated
by writ-ing two unlock cycles, followed by the Automatic
Select command. The device then enters the Automatic
Select mode, and the system may read at any address
any number of times, without initiating another command
sequence. A read cycle at address XX00h retrieves the
manufacturer code. A read cycle at address XX01h in
word mode (or xx02h in byte mode) returns the device
code. A read cycle containing a sector address (SA) and
the address 02h on A7-A0 in word mode (or the address
04h on A6-A-1 in byte mode) returns 01h if that sector is
protected, or 00h if it is unprotected. Refer to Table 1 for
valid sector addresses.
The system must write the reset command to exit the
Automatic Select mode and return to reading array data.
ENTER SECURITY SECTOR & EXIT SECURITY
SECTOR COMMAND SEQUENCE
The Security Sector provides a secured area which con-
tains a random, sixteen-byte electronic serial
number.(ESN)
The system can access the Security Sector area by is-
suing the three-cycle "Enter Security Sector command
sequence. The device continues to access the security
section area until the system issues the four-cycle Exit
Security Sector command sequence. The Exit Security
Sector command sequence returns the device to normal
operation.
BYTE/WORD PROGRAM COMMAND SEQUENCE
The device programs one byte/word of data for each
program operation. The command sequence requires four
bus cycles, and is initiated by writing two unlock write
cycles, followed by the program set-up command. The
program address and data are written next, which in turn
initiate the Embedded Program algorithm. The system is
not
required to provide further controls or timings. The
device automatically generates the program pulses and
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