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參數(shù)資料
| 型號： | MX29F800TMC-70 |
| 廠商： | MACRONIX INTERNATIONAL CO LTD |
| 元件分類： | DRAM |
| 英文描述： | 8M-BIT [1Mx8/512Kx16] CMOS FLASH MEMORY |
| 中文描述： | 512K X 16 FLASH 5V PROM, 70 ns, PDSO44 |
| 封裝： | 0.500 INCH, MO-175, SOP-44 |
| 文件頁數(shù)： | 9/42頁 |
| 文件大?。?/td> | 693K |
| 代理商： | MX29F800TMC-70 |
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9
P/N:PM0578
MX29F800T/B
REV. 1.7, JUL. 24, 2001
(no erase verification command is required). Sector
erase is a six-bus cycle operation. There are two "un-
lock" write cycles. These are followed by writing the
set-up command 80H. Two more "unlock" write cycles
are then followed by the sector erase command 30H.
The sector address is latched on the falling edge of WE
or CE, whichever happens later, while the command(data)
is latched on the rising edge of WE or CE, whichever
happens first. Sector addresses selected are loaded
into internal register on the sixth falling edge of WE or
CE, whichever happens later. Each successive sector
load cycle started by the falling edge of WE or CE,
whichever happens later must begin within 30us from
the rising edge of the preceding WE or CE, whichever
happens first. Otherwise, the loading period ends and
internal auto sector erase cycle starts. (Monitor Q3 to
determine if the sector erase timer window is still open,
see section Q3, Sector Erase Timer.) Any command other
than Sector Erase(30H) or Erase Suspend(B0H) during
the time-out period resets the device to read mode.
SECTOR ERASE COMMANDS
The Automatic Sector Erase does not require the de-
vice to be entirely pre-programmed prior to executing
the Automatic Set-up Sector Erase command and Au-
tomatic Sector Erase command. Upon executing the
Automatic Sector Erase command, the device will auto-
matically program and verify the sector(s) memory for
an all-zero data pattern. The system is not required to
provide any control or timing during these operations.
When the sector(s) is automatically verified to contain
an all-zero pattern, a self-timed sector erase and verify
begin. The erase and verify operations are complete
when the data on Q7 is "1" and the data on Q6 stops
toggling for two consecutive read cycles, at which time
the device returns to the Read mode. The system is not
required to provide any control or timing during these
operations.
When using the Automatic sector Erase algorithm, note
that the erase automatically terminates when adequate
erase margin has been achieved for the memory array
Status
Q7
Q6
Q5
Q3
Q2
RY/BY
Note1
Note2
Byte Program in Auto Program Algorithm
Q7
Toggle
0
N/A
No
0
Toggle
Auto Erase Algorithm
0
Toggle
0
1
Toggle
0
Erase Suspend Read
(Erase Suspended Sector)
1
No
0
N/A Toggle
1
Toggle
In Progress
Erase Suspended Mode
Erase Suspend Read
(Non-Erase Suspended Sector)
Data
Data
Data
Data
Data
1
Erase Suspend Program
Q7
Toggle
0
N/A
N/A
0
Byte Program in Auto Program Algorithm
Q7
Toggle
1
N/A
No
0
Toggle
Exceeded
Time Limits Auto Erase Algorithm
0
Toggle
1
1
Toggle
0
Erase Suspend Program
Q7
Toggle
1
N/A
N/A
0
Table 4. Write Operation Status
Note:
1. Q7 and Q2 require a valid address when reading status information. Refer to the appropriate subsection for further
details.
2. Q5 switches to '1' when an Auto Program or Auto Erase operation has exceeded the maximum timing limits.
See "Q5:Exceeded Timing Limits " for more information.
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