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參數(shù)資料
| 型號(hào)： | MX29F1615 |
| 廠商： | Macronix International Co., Ltd. |
| 元件分類： | DRAM |
| 英文描述： | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 中文描述： | 該CAT24FC02是一個(gè)2 KB的EEPROM的國內(nèi)256個(gè)8位每字舉辦的串行CMOS |
| 文件頁數(shù)： | 4/26頁 |
| 文件大?。?/td> | 337K |
| 代理商： | MX29F1615 |
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4
P/N: PM0615
REV. 1.1, JUN. 15, 2001
MX29F1615
SYMBOL
A0 - A19
TYPE
INPUT
NAME AND FUNCTION
ADDRESS INPUTS: for memory addresses. Addresses are internally latched
during a write cycle.
LOW-BYTE DATA BUS: Input data and commands during Command Interface
Register(CIR) write cycles. Outputs array,status and identifier data in the
appropriate read mode. Floated when the chip is de-selected or the outputs are
disabled.
HIGH-BYTE DATA BUS: Inputs data during x 16 Data-Write operations. Outputs
array, identifier data in the appropriate read mode; not used for status register
reads. Floated when the chip is de-selected or the outputs are disabled
Selects between high-byte data INPUT/OUTPUT(BYTE/VPP = HIGH) and LSB
ADDRESS(BYTE/VPP = LOW) for read operation.
CHIP ENABLE INPUTS: Activate the device's control logic, Input buffers,
decoders and sense amplifiers. With CE high, the device is de-selected and
power consumption reduces to Standby level upon completion of any current
program or erase operations. CE must be low to select the device. Device
selection occurs with the latter falling edge of CE. The first rising edge of CE
disables the device.
OUTPUT ENABLES: Gates the device's data through the output buffers during a
read cycle OE is active low.
BYTE ENABLE: While operating read mode, BYTE/VPP Low places device in x8
mode. All data is then input or output on Q0-7 and Q8-14 float. AddressQ15/A-
1 selects between the high and low byte. While operating read mode, BYTE/VPP
high places the device in x16 mode, and turns off the Q15/A-1 input buffer.
Address A0, then becomes the lowest order address. Write Enable is active while
apply 10V on the BYTE/VPP pin.
DEVICE POWER SUPPLY(5V
±
10%)
GROUND
Q0 - Q7
INPUT/OUTPUT
Q8 - Q14
INPUT/OUTPUT
Q15/A -1
INPUT/OUTPUT
CE
INPUT
OE
INPUT
BYTE/VPP
INPUT
VCC
GND
Table1.PIN DESCRIPTIONS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MX29F200TTA-12 | 2M-BIT [256Kx8/128Kx16] CMOS FLASH MEMORY |
| MX29F200TTA-90 | 2M-BIT [256Kx8/128Kx16] CMOS FLASH MEMORY |
| MX29F200TMI-12 | 2M-BIT [256Kx8/128Kx16] CMOS FLASH MEMORY |
| MX29F200TMI-70 | 2M-BIT [256Kx8/128Kx16] CMOS FLASH MEMORY |
| MX29F200BMI-12 | 2M-BIT [256Kx8/128Kx16] CMOS FLASH MEMORY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MX29F200BMC-12 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256Kx8/128Kx16] CMOS FLASH MEMORY |
| MX29F200BMC-55 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256Kx8/128Kx16] CMOS FLASH MEMORY |
| MX29F200BMC-70 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256Kx8/128Kx16] CMOS FLASH MEMORY |
| MX29F200BMC-90 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256Kx8/128Kx16] CMOS FLASH MEMORY |
| MX29F200BMI-12 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256Kx8/128Kx16] CMOS FLASH MEMORY |
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