參數(shù)資料
型號(hào)： MX28F2000TQC-90C4
廠(chǎng)商： MACRONIX INTERNATIONAL CO LTD
元件分類(lèi)： DRAM
英文描述： 2M-BIT [256K x 8] CMOS FLASH MEMORY
中文描述： 256K X 8 FLASH 12V PROM, 90 ns, PQCC32
封裝： PLASTIC, MO-052, LCC-32
文件頁(yè)數(shù)： 1/31頁(yè)
文件大?。?/td> 115K
代理商： MX28F2000TQC-90C4
FEATURES
262,144 bytes by 8-bit organization
Fast access time: 90/120 ns
Low power consumption
– 50mA maximum active current
– 100uA maximum standby current
Programming and erasing voltage 12V
±
5%
Command register architecture
– Byte Programming (15us typical)
– Auto chip erase 5 seconds typical
(including preprogramming time)
– Block Erase
Optimized high density blocked architecture
– Eight 4-KB blocks
– Fourteen 16-KB blocks
1
P/N: PM0472
Auto Erase (chip & block) and Auto Program
– DATA polling
– Toggle bit
10,000 minimum erase/program cycles
Latch-up protected to 100mA from -1 to VCC+1V
Advanced CMOS Flash memory technology
Compatible with JEDEC-standard byte-wide 32-pin
EPROM pinouts
Package type:
– 32-pin plastic DIP
– 32-pin PLCC
REV. 1.0, Jun 13, 1997
GENERAL DESCRIPTION
The MX28F2000T is a 2-mega bit Flash memory or-
ganized as 256K bytes of 8 bits each. MXIC's Flash
memories offer the most cost-effective and reliable
read/write non-volatile random access memory. The
MX28F2000T is packaged in 32-pin PDIP and PLCC
. It is designed to be reprogrammed and erased in-
system or in-standard EPROM programmers.
The standard MX28F2000T offers access times as
fast as 90 ns, allowing operation of high-speed
microprocessors without wait states. To eliminate
bus contention, the MX28F2000T has separate chip
enable (CE) and output enable (OE) controls.
MXIC's Flash memories augment EPROM function-
ality with in-circuit electrical erasure and
programming. The MX28F2000T uses a command
register to manage this functionality, while
maintaining a standard 32-pin pinout. The
command register allows for 100% TTL level control
inputs and fixed power supply levels during erase
and programming, while maintaining maximum
EPROM compatibility.
MXIC Flash technology reliably stores memory con-
tents even after 10,000 erase and program cycles.
The MXIC cell is designed to optimize the erase and
programming mechanisms. In addition, the combi-
nation of advanced tunnel oxide processing and low
internal electric fields for erase and programming
operations produces reliable cycling. The
MX28F2000T uses a 12.0V
±
5% VPP supply to
perform the Auto Program/Erase algorithms.
The highest degree of latch-up protection is
achieved with MXIC's proprietary non-epi process.
Latch-up protection is proved for stresses up to 100
milliamps on address and data pin from -1V to VCC
+ 1V.
MX28F2000T
2M-BIT [256K x 8] CMOS FLASH MEMORY
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