參數(shù)資料
型號： MUAC4K64-90TDC
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PQFP100
封裝： TQFP-100
文件頁數(shù)： 21/32頁
文件大?。?/td> 504K
代理商： MUAC4K64-90TDC
MUAC Routing CoProcessor (RCP) Family
Electrical
28
Rev. 4
Switching Characteristics
Notes:
1.
-1.0V for a duration of 10ns measured from the 50% amplitude points (see Figure 6) for input-only lines.
2.
Common I/O lines are clamped so that transients cannot fall below -0.5V.
3.
Applies to all cycle types except Compare cycles and Memory Read cycles (memory to DQ).
4.
Applies to Compare cycles (including NEXT).
5.
Control signals are /CS1, /CS2, /W, /AV, DSC, and the AC bus.
6.
With loads specified in Figure 5, Test load A from Table 7.
7.
With loads specified in Figure 5, Test load B from Table 7.
8.
/E should be HIGH during /RESET active to ensure proper device defaults.
9.
Test inputs are the TDI and TMS signals.
10.
With output and I/O pins unloaded
11.
Pins with internal pull-ups are /RESET, TCLK, TMS, TDI, and /TRST.
-35
-40
-50
-70
-90
-12
No Symbol
Parameter (all times in nanoseconds)
Min Max Min Max Min Max Min Max Min Max Min Max Notes
1a tELEL
Chip Enable Cycle Time (Other Cycles)
40
50
75
3
1b tELEL
Chip Enable Cycle Time (Compare Cycle)
35
40
50
70
90
120
4
2a tELEH
Chip Enable LOW Pulse Width (Other Cycles)
30
40
55
3
2b tELEH
Chip Enable LOW Pulse Width (Compare Cycle)
25
30
40
60
75
90
4
3
tEHEL
Chip Enable HIGH Pulse Width
9
10
4
tCVEL
Control Input to Chip Enable LOW Setup Time
5
8
10
5
tELCX
Control Input to Chip Enable LOW Hold Time
4
5
6
tELQX
Chip Enable LOW to Outputs Active
5
6
7
tELQV
Chip Enable LOW to Outputs Valid
Register
30
35
40
50
6
Memory
35
40
50
70
80
6
8
tEHQZ
Chip Enable HIGH to Outputs High-Z
2
10
2
10
2
10
2
10
2
10
2
15
7
9
tDVEL
Data to Chip Enable LOW Setup Time
4
5
6
10 tELDX
Data from Chip Enable LOW Hold Time
Commercial
4
5
Industrial n/a
5
11 tFIVEL
Full In Valid to Chip Enable LOW Setup Time
0
3
12 tFIVFFV
Full In Valid to Full Flag Valid
5688
9
12
13 tEHFFV
Chip Enable HIGH to Full Flag Valid
15
16
25
14 tEHQX
Chip Enable HIGH to Output Change
2
15 tEHQV
Chip Enable HIGH to Output Valid
15
18
22
25
30
16 tMIVEL
Match In Valid to Chip Enable LOW Setup
4
6
8
10
12
17 tEHMX
Chip Enable HIGH to Match Flag Change
2
18 tEHMV
Chip Enable HIGH to Match Flag Valid
/MF
12
14
15
17
20
25
/MM
1515
15172025
19 tELMV
Chip Enable LOW to Match Flag Valid
42
50
60
n/a
20 tMIVMV
Match In Valid to Match Flag Valid
/MF
5688
9
12
/MM
7788
9
12
21 tOEHQZ
Output Enable HIGH to Outputs High-Z
2
10
2
10
2
10
2
10
2
10
2
15
22 tOELQV
Output Enable LOW to Match Address Outputs Valid
8
10
12
14
16
23 tMIVOEL
Match in Valid to Output Enable LOW
3
4
24 tFIVOEL
Full in Valid to Output Enable LOW
3
4
25 tEHRSTL
Chip Enable HIGH to Reset LOW
10
15
20
25
26 tRSTLRSTH
Reset Pulse Width
25
30
50
70
8
27 tRSTHEL
Reset HIGH to Chip Enable LOW
10
15
20
25
28 tTIVTCLKH
Test Input Valid to TCLK HIGH Setup Time
20
25
9
29 tTCLKHTIX
TCLK HIGH to Test Input Hold Time
20
25
9
30 tTCLKLTDOX TCLK LOW to TDO Change
2
10
2
10
2
10
2
10
2
10
2
15
31 tTCLKLTDOV TCLK LOW to TDO Valid
20
25
32 tTCLKLTDOZ TCLK LOW to TDO High-Z
20
25
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