參數(shù)資料
型號(hào): MTP10N10EL
廠商: MOTOROLA INC
元件分類: JFETs
英文描述: TMOS POWER FET 10 AMPERES 100 VOLTS RDS(on) = 0.22 OHMS
中文描述: 10 A, 100 V, 0.25 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB
文件頁(yè)數(shù): 1/8頁(yè)
文件大?。?/td> 221K
代理商: MTP10N10EL
1
Motorola, Inc. 1996
N–Channel Enhancement–Mode Silicon Gate
This advanced TMOS power FET is designed to withstand high
energy in the avalanche and commutation modes. This new energy
efficient design also offers a drain–to–source diode with a fast
recovery time. Designed for low voltage, high speed switching
applications in power supplies, converters and PWM motor
controls, these devices are particularly well suited for bridge circuits
where diode speed and commutating safe operating areas are
critical and offer additional safety margin against unexpected
voltage transients.
Avalanche Energy Specified
Source–to–Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
Diode is Characterized for Use in Bridge Circuits
IDSS and VDS(on) Specified at Elevated Temperature
MAXIMUM RATINGS
(TC = 25
°
C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain–to–Source Voltage
VDSS
VDGR
VGS
VGSM
100
Vdc
Drain–to–Gate Voltage (RGS = 1.0 M
)
Gate–to–Source Voltage — Continuous
100
Vdc
— Non–Repetitive (tp
10 ms)
±
15
±
20
Vdc
Vpk
Drain Current — Continuous @ TC = 25
°
C
— Continuous @ TC = 100
°
C
— Single Pulse (tp
10
μ
s)
Total Power Dissipation @ TC = 25
°
C
Derate above 25
°
C
Total Power Dissipation @ TC = 25
°
C (1)
ID
ID
IDM
10
6.0
35
Adc
Apk
PD
40
0.32
1.75
Watts
W/
°
C
Watts
Operating and Storage Temperature Range
TJ, Tstg
EAS
–55 to 150
°
C
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25
°
C
(VDD = 25 Vdc, VGS = 5.0 Vdc, Peak IL = 10 Adc, L = 1.0 mH, RG = 25
)
50
mJ
Thermal Resistance — Junction to Case
°
— Junction to Ambient
— Junction to Ambient (1)
R
θ
JC
R
θ
JA
R
θ
JA
TL
3.13
100
71.4
°
C/W
Maximum Lead Temperature for Soldering Purposes, 1/8
from case for 10 seconds
260
°
C
(1) When surface mounted to an FR4 board using the minimum recommended pad size.
Designer’s Data for “Worst Case” Conditions
— The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Preferred
devices are Motorola recommended choices for future use and best overall value.
Order this document
by MTP10N10EL/D
SEMICONDUCTOR TECHNICAL DATA
TMOS POWER FET
10 AMPERES
100 VOLTS
RDS(on) = 0.22 OHMS
Motorola Preferred Device
D
S
G
CASE 221A–06, Style 5
TO–220AB
相關(guān)PDF資料
PDF描述
MTP10N10E TMOS POWER FETs 10 AMPERES 100 VOLTS RDS(on) = 0.25 OHM
MTP12N05E POWER FIELD EFFECT TRANSISTOR
MTP12N10E TMOS POWER FET 12 AMPERES 100 VOLTS RDS(on) = 0.16 OHM
MTP1N60E TMOS POWER FET 1.0 AMPERES 600 VOLTS RDS(on) = 8.0 OHM
MTP1N80E TMOS POWER FET 1.0 AMPERES 800 VOLTS RDS(on) = 12 OHMS
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