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參數(shù)資料
| 型號： | MTD3055VT4 |
| 廠商： | MOTOROLA INC |
| 元件分類： | JFETs |
| 英文描述： | 12 A, 60 V, 0.15 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 文件頁數(shù)： | 3/10頁 |
| 文件大?。?/td> | 206K |
| 代理商： | MTD3055VT4 |
MTD3055V
2
Motorola TMOS Power MOSFET Transistor Device Data
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 250 Adc)
Temperature Coefficient (Positive)
V(BR)DSS
60
–
65
–
Vdc
mV/
°C
Zero Gate Voltage Drain Current
(VDS = 60 Vdc, VGS = 0 Vdc)
(VDS = 60 Vdc, VGS = 0 Vdc, TJ = 150°C)
IDSS
–
10
100
Adc
Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0)
IGSS
–
100
nAdc
ON CHARACTERISTICS (1)
Gate Threshold Voltage
(VDS = VGS, ID = 250 Adc)
Temperature Coefficient (Negative)
VGS(th)
2.0
–
2.7
5.4
4.0
–
Vdc
mV/
°C
Static Drain–Source On–Resistance (VGS = 10 Vdc, ID = 6.0 Adc)
RDS(on)
–
0.10
0.15
Ohm
Drain–Source On–Voltage (VGS = 10 Vdc)
(ID = 12 Adc)
(ID = 6.0 Adc, TJ = 150°C)
VDS(on)
–
1.3
–
2.2
1.9
Vdc
Forward Transconductance (VDS = 7.0 Vdc, ID = 6.0 Adc)
gFS
4.0
5.0
–
mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
(VDS = 25 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
Ciss
–
410
500
pF
Output Capacitance
(VDS = 25 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
Coss
–
130
180
Reverse Transfer Capacitance
f = 1.0 MHz)
Crss
–
25
50
SWITCHING CHARACTERISTICS (2)
Turn–On Delay Time
(VDD = 30 Vdc, ID = 12 Adc,
VGS = 10 Vdc,
RG = 9.1 )
td(on)
–
7.0
10
ns
Rise Time
(VDD = 30 Vdc, ID = 12 Adc,
VGS = 10 Vdc,
RG = 9.1 )
tr
–
34
60
Turn–Off Delay Time
VGS = 10 Vdc,
RG = 9.1 )
td(off)
–
17
30
Fall Time
G = 9.1 )
tf
–
18
50
Gate Charge
(See Figure 8)
(VDS = 48 Vdc, ID = 12 Adc,
VGS = 10 Vdc)
QT
–
12.2
17
nC
(See Figure 8)
(VDS = 48 Vdc, ID = 12 Adc,
VGS = 10 Vdc)
Q1
–
3.2
–
(VDS = 48 Vdc, ID = 12 Adc,
VGS = 10 Vdc)
Q2
–
5.2
–
Q3
–
5.5
–
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage (1)
(IS = 12 Adc, VGS = 0 Vdc)
(IS = 12 Adc, VGS = 0 Vdc, TJ = 150°C)
VSD
–
1.0
0.91
1.6
–
Vdc
Reverse Recovery Time
(See Figure 15)
(IS = 12 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/s)
trr
–
56
–
ns
(See Figure 15)
(IS = 12 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/s)
ta
–
40
–
(IS = 12 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/s)
tb
–
16
–
Reverse Recovery Stored Charge
QRR
–
0.128
–
C
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from the drain lead 0.25
″ from package to center of die)
LD
–
4.5
–
nH
Internal Source Inductance
(Measured from the source lead 0.25
″ from package to source bond pad)
LS
–
7.5
–
nH
(1) Pulse Test: Pulse Width
≤ 300 s, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
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