參數(shù)資料
型號: MTB2N40ET4
廠商: MOTOROLA INC
元件分類: JFETs
英文描述: 2 A, 400 V, 3.5 ohm, N-CHANNEL, Si, POWER, MOSFET
文件頁數(shù): 3/10頁
文件大?。?/td> 271K
代理商: MTB2N40ET4
MTB2N40E
2
Motorola TMOS Power MOSFET Transistor Device Data
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 250 Adc)
Temperature Coefficient (Positive)
V(BR)DSS
400
451
Vdc
mV/
°C
Zero Gate Voltage Drain Current
(VDS = 400 Vdc, VGS = 0 Vdc)
(VDS = 400 Vdc, VGS = 0 Vdc, TJ = 125°C)
IDSS
10
100
Adc
Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0)
IGSS
100
nAdc
ON CHARACTERISTICS (1)
Gate Threshold Voltage
(VDS = VGS, ID = 250 Adc)
Threshold Temperature Coefficient (Negative)
VGS(th)
2.0
3.2
7.0
4.0
Vdc
mV/
°C
Static Drain–to–Source On–Resistance (VGS = 10 Vdc, ID = 1.0 Adc)
RDS(on)
3.1
3.5
Ohm
Drain–to–Source On–Voltage
(VGS = 10 Vdc, ID = 2.0 Adc)
(VGS = 10 Vdc, ID = 1.0 Adc, TJ = 125°C)
VDS(on)
7.3
8.4
7.4
Vdc
Forward Transconductance (VDS = 50 Vdc, ID = 1.0 Adc)
gFS
0.5
1.0
mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
(VDS = 25 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
Ciss
229
320
pF
Output Capacitance
(VDS = 25 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
Coss
34
40
Transfer Capacitance
f = 1.0 MHz)
Crss
7.3
10
SWITCHING CHARACTERISTICS (2)
Turn–On Delay Time
(VDD = 200 Vdc, ID = 2.0 Adc,
VGS = 10 Vdc,
RG = 9.1 )
td(on)
8.0
16
ns
Rise Time
(VDD = 200 Vdc, ID = 2.0 Adc,
VGS = 10 Vdc,
RG = 9.1 )
tr
8.4
14
Turn–Off Delay Time
VGS = 10 Vdc,
RG = 9.1 )
td(off)
12
26
Fall Time
G = 9.1 )
tf
11
20
Gate Charge
(See Figure 8)
(VDS = 320 Vdc, ID = 2.0 Adc,
VGS = 10 Vdc)
QT
8.6
12
nC
(See Figure 8)
(VDS = 320 Vdc, ID = 2.0 Adc,
VGS = 10 Vdc)
Q1
2.6
(VDS = 320 Vdc, ID = 2.0 Adc,
VGS = 10 Vdc)
Q2
3.2
Q3
5.0
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage (1)
(IS = 2.0 Adc, VGS = 0 Vdc )
(IS = 2.0 Adc, VGS = 0 Vdc , TJ = 125°C)
VSD
0.88
0.76
1.2
Vdc
Reverse Recovery Time
(See Figure 14)
(IS = 2.0 Adc, VGS = 0 Vdc,
dlS/dt = 100 A/s)
trr
156
ns
(See Figure 14)
(IS = 2.0 Adc, VGS = 0 Vdc,
dlS/dt = 100 A/s)
ta
99
(IS = 2.0 Adc, VGS = 0 Vdc,
dlS/dt = 100 A/s)
tb
57
Reverse Recovery Stored Charge
QRR
0.89
C
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from the drain lead 0.25
″ from package to center of die)
LD
4.5
nH
Internal Source Inductance
(Measured from the source lead 0.25
″ from package to source bond pad)
LS
7.5
nH
(1) Pulse Test: Pulse Width
≤ 300 s, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
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