參數(shù)資料
型號(hào)： MTB1N100ET4
廠商： MOTOROLA INC
元件分類： JFETs
英文描述： 1 A, 1000 V, 9 ohm, N-CHANNEL, Si, POWER, MOSFET
文件頁(yè)數(shù)： 3/10頁(yè)
文件大?。?/td> 256K
代理商： MTB1N100ET4
MTB1N100E
2
Motorola TMOS Power MOSFET Transistor Device Data
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 250 Adc)
Temperature Coefficient (Positive)
V(BR)DSS
1000
—
1.251
—
Vdc
mV/
°C
Zero Gate Voltage Drain Current
(VDS = 1000 Vdc, VGS = 0 Vdc)
(VDS = 1000 Vdc, VGS = 0 Vdc, TJ = 125°C)
IDSS
—
10
100
Adc
Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0)
IGSS
—
100
nAdc
ON CHARACTERISTICS (1)
Gate Threshold Voltage
(VDS = VGS, ID = 250 Adc)
Temperature Coefficient (Negative)
VGS(th)
2.0
—
6.0
4.0
—
Vdc
mV/
°C
Static Drain–Source On–Resistance (VGS = 10 Vdc, ID = 0.5 Adc)
RDS(on)
—
6.7
9.0
Ohm
Drain–Source On–Voltage (VGS = 10 Vdc)
(ID = 1.0 Adc)
(ID = 0.5 Adc, TJ = 125°C)
VDS(on)
—
4.86
—
9.0
10.5
Vdc
Forward Transconductance (VDS = 15 Vdc, ID = 0.5 Adc)
gFS
0.9
1.32
—
mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
(VDS = 25 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
Ciss
—
587
810
pF
Output Capacitance
(VDS = 25 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
Coss
—
59.6
120
Reverse Transfer Capacitance
f = 1.0 MHz)
Crss
—
12.2
25
SWITCHING CHARACTERISTICS (2)
Turn–On Delay Time
(VDD = 500 Vdc, ID = 1.0 Adc,
VGS = 10 Vdc,
RG = 9.1 )
td(on)
—
9.0
20
ns
Rise Time
(VDD = 500 Vdc, ID = 1.0 Adc,
VGS = 10 Vdc,
RG = 9.1 )
tr
—
12
25
Turn–Off Delay Time
VGS = 10 Vdc,
RG = 9.1 )
td(off)
—
28
50
Fall Time
G = 9.1 )
tf
—
34
70
Gate Charge
(See Figure 8)
(VDS = 400 Vdc, ID = 1.0 Adc,
VGS = 10 Vdc)
QT
—
14.6
20
nC
(See Figure 8)
(VDS = 400 Vdc, ID = 1.0 Adc,
VGS = 10 Vdc)
Q1
—
2.8
—
(VDS = 400 Vdc, ID = 1.0 Adc,
VGS = 10 Vdc)
Q2
—
6.8
—
Q3
—
5.2
—
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage (1)
(IS = 1.0 Adc, VGS = 0 Vdc)
(IS = 1.0 Adc, VGS = 0 Vdc, TJ = 125°C)
VSD
—
0.764
0.62
1.0
—
Vdc
Reverse Recovery Time
(See Figure 14)
(IS = 1.0 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/s)
trr
—
655
—
ns
(See Figure 14)
(IS = 1.0 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/s)
ta
—
42
—
(IS = 1.0 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/s)
tb
—
613
—
Reverse Recovery Stored Charge
QRR
—
0.957
—
C
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from the drain lead 0.25
″ from package to center of die)
LD
—
4.5
—
nH
Internal Source Inductance
(Measured from the source lead 0.25
″ from package to source bond pad)
LS
—
7.5
—
nH
(1) Pulse Test: Pulse Width
≤ 300 s, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
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