
Semiconductor Components Industries, LLC, 1999
October, 1999 – Rev. 0
1
Publication Order Number:
MTB10N60E7/D
MTB10N60E7
Preferred Device
Advance Information
TMOS 7 E-FET
High Energy Power FET
N–Channel Enhancement–Mode
Silicon Gate
The D2PAK package has the capability of housing a larger die than
any existing surface mount package which allows it to be used in
applications that require the use of surface mount components with
higher power and lower RDS(on) capabilities. This advanced TMOS
E–FET is designed to withstand high energy in the avalanche and
commutation modes. This new energy efficient design also offers a
drain–to–source diode with a fast recovery time. Designed for high
voltage, high speed switching applications in power supplies,
converters and PWM motor controls. These devices are particularly
well suited for bridge circuits where diode speed and commutating
safe operating areas are critical and offer additional safety margin
against unexpected voltage transients.
New Features of TMOS 7
Ultra Low On–Resistance Provides Higher Efficiency
Reduced Gate Charge
Features Common to TMOS 7 and TMOS E–FETS
Avalanche Energy Specified
Diode Characterized for Use in Bridge Circuits
IDSS and VDS(on) Specified at Elevated Temperature
Industry Standard D2PAK Surface Mount Package
Surface Mount Package Available in 24 mm, 13–inch/800 Unit Tape
& Reel, Add T4 Suffix to Part Number
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain–Source Voltage
VDSS
600
Vdc
Drain–Gate Voltage (RGS = 1.0 M)
VDGR
600
Vdc
Gate–Source Voltage
— Continuous
— Non–Repetitive (tpv10 ms)
VGS
VGSM
"20
"30
Vdc
Drain — Continuous
— Continuous @ 100
°C
— Single Pulse (tpv10 s)
ID
IDM
10
8.0
35
Adc
Total Power Dissipation
Derate above 25
°C
PD
201
1.61
Watts
W/
°C
Operating and Storage Temperature
Range
TJ, Tstg
– 55 to
150
°C
Single Drain–to–Source Avalanche
Energy — Starting TJ = 25°C
(VDD = 100 V, VGS = 10 Vdc,
IL = 10 A, L = 8 mH, RG = 25 )
EAS
400
mJ
Thermal Resistance
— Junction–to–Case
— Junction–to–Ambient(1)
R
θJC
R
θJA
R
θJA
0.62
62.5
50
°C/W
Maximum Lead Temperature for Soldering
Purposes, 1/8
″ from case for 10 seconds
TL
260
°C
(1) When surface mounted to an FR4 board using the minimum recommended
pad size.
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
TMOS POWER FET
10 AMPERES
600 VOLTS
RDS(on) = 0.75
Device
Package
Shipping
ORDERING INFORMATION
MTB10N60E7
D2PAK
50 Units/Rail
D2PAK
CASE 418B
STYLE 2
1
2
3
4
PIN ASSIGNMENT
1
2
3
Source
Gate
Drain
4
Drain
http://onsemi.com
N–Channel
D
S
G
MTB10N60E7T4
D2PAK
800 Tape & Reel
Preferred devices are recommended choices for future use
and best overall value.